Vertical injection logic
1975; Linguagem: Inglês
10.1109/iedm.1975.188946
AutoresTakao Nakano, Y. Horiba, A. Yasuoka, O. Tomisawa, Koso Murakami, S. Kato,
Tópico(s)Quantum-Dot Cellular Automata
ResumoA novel structure, Vertical Injection Logic (VIL) is proposed for getting a superior power-delay product. VIL has a device structure in which PNP transistor is arranged vertically below NPN transistor to obtain the narrow base width by two diffusion steps. The current gain of the PNP device described increases to almost 0.9 in comparison with 0.4 of the usual one. The experimental results show a minimum stage delay of 8.8 ns and a power-delay product of 0.07 pJ compared to 37 ns and 0.3 pJ for the usual I 2 L device.
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