Senling Wang, Xihong Zhou, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima,
... require testing in the field, such as the power-on self-test (POST) . Unlike the production test, the POST requires ... a test point insertion technique for multi-cycle power-on self-test to reduce the test application time under the ...
Tópico(s): Radiation Effects in Electronics
2022 - Association for Computing Machinery | ACM Transactions on Design Automation of Electronic Systems
... test, which is performed as part of the power-on self-test. Essential to the idea is the use of ... testing can be accomplished as part of the power-on self-test without external test fixtures. >
Tópico(s): Electrostatic Discharge in Electronics
1992 - Institute of Electrical and Electronics Engineers | IEEE Transactions on Reliability
... test, which is performed as part of the power-on self-test (POST) at the manufacturing stage. Essential to the implementation is the idea of response compression using the multiple ...
Tópico(s): 3D IC and TSV technologies
1992 - Institute of Electrical and Electronics Engineers | IEEE Transactions on Instrumentation and Measurement
Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Jun Matsushima,
Power-on self-test is an efficient means for covering safety-critical faults in automotive systems. This paper presents a ...
Tópico(s): Physical Unclonable Functions (PUFs) and Hardware Security
2018 - Institute of Electrical and Electronics Engineers | IEEE Design and Test
... diagnostic levels: a prom-based (programmable memory chip), power-on self test (POST), and a functional diagnostic test suite, contained ...
Tópico(s): Optimal Experimental Design Methods
1995 - Institute of Electrical and Electronics Engineers | IEEE Transactions on Components Packaging and Manufacturing Technology Part A
Soheil Salehi, Navid Khoshavi, Ramtin Zand, Ronald F. DeMara,
... In particular, based on the result of a Power-On Self-Test (POST), which detects PV-impact on sub-banks, ...
Tópico(s): Magnetic properties of thin films
2018 - Elsevier BV | Integration
J. W. Bishop, M. J. Campion, T. L. Jeremiah, S. J. Mercier, E. J. Mohring, K. P. Pfarr, Barry Rudolph, Gregory Still, Tennis S. White,
... correction, and error-logging functions, as well as self-test for logic and arrays during power-on. The design is robust and implements a wide ...
Tópico(s): VLSI and Analog Circuit Testing
1996 - IBM | IBM Journal of Research and Development
C. S. Ábrahám, Sagar Deshpande,
... water trap will be detected during the Primus Power-On Self Test. To prevent 'dripping' of anaesthetic agent onto the ...
Tópico(s): Airway Management and Intubation Techniques
2006 - Lippincott Williams & Wilkins | European Journal of Anaesthesiology
R. Srivel, Ranjit Singh, Arokiaraj David,
... for FXO and FXS, SHDSL Control Pin Mapping, Power on Self-Test With Respect to Clock Monitor and Generation of ... FPGA, So, that the Title FPGA Implementation of Power on Self-Test On Services Card Justifies.
Tópico(s): Embedded Systems Design Techniques
2018 - RELX Group (Netherlands) | SSRN Electronic Journal
R. Srivel, Dr R. P. Singh, Dr D. Arokiaraj,
... for FXO and FXS, SHDSL Control Pin Mapping, Power on Self-Test With Respect to Clock Monitor and Generation of ... FPGA, So, that the Title FPGA Implementation of Power on Self-Test On Services Card Justifies.
Tópico(s): Embedded Systems Design Techniques
2018 - | International Journal of Engineering & Technology
Hanan T. Al-Awadhi, Tomoki Aono, Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima,
... to reduce the test application time of POST (Power-on Self-Test) for achieving a targeted high fault coverage specified ...
Tópico(s): Radiation Effects in Electronics
2020 - Institute of Electronics, Information and Communication Engineers | IEICE Transactions on Information and Systems
Efe Öztürk, Dieter Genschow, Uroschanit Yodprasit, Selahattin Berk Yilmaz, Dietmar Kissinger, Wojciech Dębski, Wolfgang Winkler,
... in order to monitor the transmitted and reflected powers on the TX channel by passing through a branchline coupler for built-in-self-test purposes. The total current consumption of this transceiver ...
Tópico(s): Acoustic Wave Resonator Technologies
2017 - IEEE Microwave Theory and Techniques Society | IEEE Transactions on Microwave Theory and Techniques
... computer when it is in the process of Power On Self Test and then runs the programn of MicroElectroMechanical discriminator. ...
Tópico(s): Fault Detection and Control Systems
2006 - Sriwijaya University | Computer Engineering and Applications Journal
... five stages such as power or rese, BIOS power-on self test, startup of LILO in MBR, linux kernel running ...
Tópico(s): Experimental Learning in Engineering
2003 - China Aerospace Science and Industry Group | Jisuanji gongcheng yu sheji
Nicola Campregher, Peter Y. K. Cheung, Milan Vasilko,
... approach to interconnect fault location for FPGAs during power-on sequence. The method is based on a concept known as fault grading which utilizes defect knowledge during manufacturing test to classify faulty devices into different defect groups. A Built-In Self-Test (BIST) method that can efficiently identify the exact ...
Tópico(s): VLSI and FPGA Design Techniques
2004 - Springer Science+Business Media | Lecture notes in computer science
... faults in advance, the appliance also provide a self-test function, which will communicate with the integrated instrument system in vehicle and do simulation test right after the vehicle power on. This appliance can help to urge and ensure ...
Tópico(s): Vehicle License Plate Recognition
2018 - American Institute of Physics | AIP conference proceedings
Clifford Howard, Kris Dickson, Kent Erington,
... asynchronous Low Voltage Detect (LVD) interrupt during the self-test portion of the reset sequence of a microcontroller randomly caused a corrupted clock state that was not recoverable except through a power on reset, or POR. This paper discusses the techniques ...
Tópico(s): Radiation Effects in Electronics
2016 - | Proceedings - International Symposium for Testing and Failure Analysis
Gergely Hantos, David Flynn, Marc P. Y. Desmulliez,
A novel taxonomy of built-in self-test (BIST) methods is presented for the testing of micro-electro-mechanical systems (MEMS). With MEMS testing representing 50% of the total costs ... application of the method that includes field test, power-on test or assembly phase test. Although BIST methods ...
Tópico(s): Force Microscopy Techniques and Applications
2020 - Multidisciplinary Digital Publishing Institute | Micromachines
... management to design and verify the sleep-based power-on system by using a set of Xilinx SOC processing chips and external memory (Micron) DDR3, 4 bit PROM SPI FLASH, TF-CARD, and EMMC Implement. This paper studies how to reasonably use idle time to manage normal working mode, deep sleep mode, shallow sleep and self-test mode while ensuring that it can be switched ...
Tópico(s): Industrial Automation and Control Systems
2023 - Springer Science+Business Media | Lecture notes in electrical engineering
Shyue-Kung Lu, C. Tsai, Masaki Hashizume,
... spares for the remaining faults in the production/power-ON test and repair stage. However, techniques are proposed ...
Tópico(s): Semiconductor materials and devices
2016 - Institute of Electrical and Electronics Engineers | IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Stefano Di Carlo, Marco Gaudesi, Ernesto Sánchez, M. Sonza Reorda,
... to test the ROB is through Built-In Self-Test solutions, which are typically adopted by manufacturers for ... for in-field test, e.g., at the power-on, power-off, or during the time slots unused ...
Tópico(s): Embedded Systems Design Techniques
2014 - Springer Science+Business Media | Journal of Electronic Testing
Mohamed H. El-Mahlawy, Sherif Anas Mohamed Hamdy,
... from the worst-case analysis. The built-in self-test controller is devised to properly synchronize the process ...
Tópico(s): Physical Unclonable Functions (PUFs) and Hardware Security
2024 - Elsevier BV | Ain Shams Engineering Journal