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A Genetic Algorithm for VLSI Floorplanning

2000; Springer Science+Business Media; Linguagem: Inglês

10.1007/3-540-45356-3_66

1611-3349

Christine L. Valenzuela, Pearl Y. Wang,

Computational Geometry and Mesh Generation

We present a genetic algorithm (GA) which uses a normalized postfix encoding scheme to solve the VLSI floorplanning problem. We claim to have overcome the representational problems previously associated with encoding postfix expressions into GAs, and have developed a novel encoding system which preserves the integrity of solutions under all the genetic operators. Optimal floorplans are obtained for module sets taken from some MCNC benchmarks. The slicing tree construction process, used by our GA to generate the floorplans, has a run time scaling which compares very favourably with other recent approaches.