Highly Linear 2.5-V CMOS>tex<$Sigma Delta $>/tex<Modulator for>tex<$hboxADSL+$>/tex<
2004; Institute of Electrical and Electronics Engineers; Volume: 51; Issue: 1 Linguagem: Inglês
10.1109/tcsi.2003.821308
ISSN1558-1268
AutoresR. delRio, José M. de la Rosa, B. Pérez-Verdú, Manuel Delgado‐Restituto, R. Domínguez‐Castro, F. Medeiro, Á. Rodríguez‐Vázquez,
Tópico(s)Radio Frequency Integrated Circuit Design
ResumoWe present a 90-dB spurious-free dynamic range sigma-delta modulator (/spl Sigma//spl Delta/M) for asymmetric digital subscriber line applications (both ADSL and ADSL+), with up to a 4.4-MS/s digital output rate. It uses a cascade (MASH) multibit architecture and has been implemented in a 2.5-V supply, 0.25-/spl mu/m CMOS process with metal-insulator-metal capacitors. The prototypes feature 78-dB dynamic range (DR) in the 30-kHz to 2.2-MHz band (ADSL+) and 85-dB DR in the 30-kHz to 1.1-MHz band (ADSL). Integral and differential nonlinearity are within /spl plusmn/0.85 and /spl plusmn/0.80 LSB/sub 14 b/, respectively. The /spl Sigma//spl Delta/ modulator and its auxiliary blocks (clock phase and reference voltage generators, and I/O buffers) dissipate 65.8 mW. Only 55 mW are dissipated in the /spl Sigma//spl Delta/ modulator.
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