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ATLAS I: A single-chip ATM switch for NOWs

1997; Springer Science+Business Media; Linguagem: Inglês

10.1007/3-540-62573-9_7

ISSN

1611-3349

Autores

Manolis Katevenis, Dimitrios Serpanos, Panagiota Vatsolaki, Evangelos P. Markatos,

Tópico(s)

Real-Time Systems Scheduling

Resumo

Although ATM (Asynchronous Transfer Mode), is a widely accepted standard for WANs (Wide Area Networks), it has not yet been widely embraced by the NOW community, because (i) most current ATM switches (and interfaces) have high latency, and and (ii) they drop cells when (even short-term) congestion happens. In this paper, we present ATLAS I, a single-chip ATM switch with 20 Gbits/sec aggregate I/O throughput, that was designed to address the above concerns. ATLAS I provides sub-microsecond cut-through latency, and (optional) back-pressure (credit-based) flow control which never drops ATM cells. The architecture of ATLAS I has been fully specified and the design of the chip is well under progress. ATLAS I will be fabricated by SGS Thomson, Crolles, France, in 0.5 μm CMOS technology.

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