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3 Gb/s AC Coupled Chip-to-Chip Communication Using a Low Swing Pulse Receiver

2005; Institute of Electrical and Electronics Engineers; Volume: 41; Issue: 1 Linguagem: Inglês

10.1109/jssc.2005.859881

1558-173X

Lei Luo, John Wilson, Stephen Mick, J. Q. Xu, Liang Zhang, Paul D. Franzon,

Semiconductor Lasers and Optical Devices

A 120-mV/sub ppd/ low swing pulse receiver is presented for AC coupled interconnect (ACCI). Using this receiver, 3Gb/s chip-to-chip communication is demonstrated through a wire-bonded ACCI channel with 150-fF coupling capacitors, across 15-cm FR4 microstrip lines. A test chip was fabricated in TSMC 0.18-/spl mu/m CMOS technology and the driver and pulse receiver dissipate 15-mW power per I/O at 3 Gb/s, with a bit error rate less than 10/sup -12/. First-time demonstration of a flip-chip ACCI is also presented, with both the AC and DC connections successfully integrated between the flipped chip and the multichip module (MCM) substrate by using the buried bump technology. For the flip-chip ACCI, 2.5 Gb/s/channel communication is demonstrated across 5.6 cm of transmission line on a MCM substrate.