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Transistor Scaling to the Limit

2008; Springer Science+Business Media; Linguagem: Inglês

10.1007/978-3-540-74559-4_8

2196-2812

T. -J. K. Liu, L. Chang,

Integrated Circuits and Semiconductor Failure Analysis

The steady miniaturization of the metal-oxide-semiconductor field-effect transistor (MOSFET) with each new generation of complementary-MOS (CMOS) technology has yielded continual improvements in integrated-circuit performance and cost per function for more than 40 years. Until recently, transistor scaling generally followed simple rules [] with slight modification (Table 8.1) [, ] to provide for improvements in circuit speed and density with reduction in power consumption per function, while maintaining reliability and electrostatic integrity (gate voltage control of the source-to-channel potential barrier) of the device itself. As a result, MOSFET scaling was able to progress at an exponential rate [], yielding commensurate improvements in integration, cost, and performance, with revolutionary impact to usher in the Information Age.