Plasma etching antenna effect on oxide-silicon interface reliability
1993; Elsevier BV; Volume: 36; Issue: 9 Linguagem: Inglês
10.1016/0038-1101(93)90178-s
ISSN1879-2405
Autores Tópico(s)Integrated Circuits and Semiconductor Failure Analysis
ResumoThe study reported herein examines and compares damage to n-channel and p-channel metal–oxide–silicon field-effect transistors (MOSFETs) from direct current (d.c.) and alternating current (a.c.) electrical stresses as well as the relationship of this damage to plasma processing damage in MOSFETs. The lightly-doped drain (LDD) MOSFETs used are of 0.5 μm channel length and with a 90 Å thick thermally grown gate oxide fabricated using a full flow CMOS process up to and including metal-1 processes and post-metallization annealing (PMA). The damage to MOSFETs is assessed using transistor parameter characterization and charge-to-breakdown measurements on the gate oxide. It is found that manifestations of d.c. stress-induced damage and a.c. stress-induced damage to transistors are fairly similar in that both forms of damage are passivated by PMA and are reactivated by a subsequent d.c. electrical stress. However, a.c. stress-induced damage is observed to occur at much lower electric fields across the gate oxide than those necessary for d.c. stress-induced damage to be significant. This is attributed to a.c. currents, caused by carrier hopping, occurring at relatively low electric fields. One implication of our results is that plasma-charging damage, often attributed to d.c. electrical stress alone, may comprise an a.c. electrical stress component too.
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