Simulated Fault Injection Using Simulator Modification Technique
2011; Electronics and Telecommunications Research Institute; Volume: 33; Issue: 1 Linguagem: Inglês
10.4218/etrij.11.0110.0106
ISSN2233-7326
Autores Tópico(s)Semiconductor materials and devices
ResumoETRI JournalVolume 33, Issue 1 p. 50-59 Regular PaperFree Access Simulated Fault Injection Using Simulator Modification Technique Jongwhoa Na, Jongwhoa NaSearch for more papers by this authorDongwoo Lee, Dongwoo LeeSearch for more papers by this author Jongwhoa Na, Jongwhoa NaSearch for more papers by this authorDongwoo Lee, Dongwoo LeeSearch for more papers by this author First published: 01 February 2011 https://doi.org/10.4218/etrij.11.0110.0106Citations: 5 Jongwhoa Na (phone: +82 2 300 0410, email: [email protected]) and Dongwoo Lee (email: [email protected]) are with the Department of Electronics Engineering, Korea Aerospace University, Seoul, Rep. of Korea. AboutPDF ToolsExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onEmailFacebookTwitterLinkedInRedditWechat Abstract In the current very deep submicron technology era, fault tolerant mechanisms perform an essential function to cope with the effects of soft errors. To evaluate the effectiveness of the fault tolerant mechanism, reliability engineers use simulated fault injections using either saboteur modules or mutants in the simulation model. However, the two methods suffer from both inefficiency in the simulation mechanism and difficulties with the experimental setups. To overcome these inefficiencies, we propose the Verilog-based simulated fault injection (VFI) technique. VFI has the following advantages. First, modification of the design model is unnecessary. Second, the fault injection simulation procedure is simple and efficient. Third, various types of fault injection experiments can be performed. To evaluate the effectiveness of the proposed methodology, we developed a VFI environment using the ICARUS Verilog Simulator. From the experimental results, we were able to qualitatively evaluate the reliability of the target simulation models and to assess the effectiveness of the employed fault-tolerance mechanisms. References 1L. Anghel et al., “Multi-level Fault Effects Evaluation,” Radiation Effects on Embedded System, Springer, 2007, pp. 69–88. 10.1007/978-1-4020-5646-8_4 Google Scholar 2D.W. Lee and J.W. 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