Artigo Acesso aberto Produção Nacional Revisado por pares

Electrical Impedance Tomography Reconstruction Through Simulated Annealing using a New Outside-in Heuristic and GPU Parallelization

2012; IOP Publishing; Volume: 407; Linguagem: Inglês

10.1088/1742-6596/407/1/012015

ISSN

1742-6596

Autores

Renato Seiji Tavares, Thiago C. Martins, Marcos de Sales Guerra Tsuzuki,

Tópico(s)

Microwave Imaging and Scattering Analysis

Resumo

Electrical Impedance Tomography (EIT) is an imaging technique that attempts to reconstruct the conductivity distribution inside an object from electrical currents and potentials applied and measured at its surface. The EIT reconstruction problem is approached as an optimization problem, where the difference between the simulated and measured distributions must be minimized. This optimization problem can be solved using Simulated Annealing (SA), but at a high computational cost. To reduce the computational load, it is possible to use an incomplete evaluation of the objective function. This algorithm showed to present an outside-in behavior, determining the impedance of the external elements first, similar to a layer striping algorithm. A new outside-in heuristic to make use of this property is proposed. It also presents the impact of using GPU for parallelizing matrix-vector multiplication and triangular solvers. Results with experimental data are presented. The outside-in heuristic showed to be faster when compared to the conventional SA algorithm.

Referência(s)