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10 Gbps TCP/IP streams from the FPGA for High Energy Physics

2014; IOP Publishing; Volume: 513; Issue: 1 Linguagem: Inglês

10.1088/1742-6596/513/1/012042

1742-6596

G. Bauer, Tomasz Bawej, U. Behrens, J. G. Branson, Olivier Chaze, Sergio Cittolin, J. A. Coarasa, Georgiana-Lavinia Darlea, Christian Deldicque, Marc Dobson, Aymeric Dupont, S. Erhan, D. Gigi, F. Glege, G. Gomez Ceballos, Robert Gómez-Reino, Christian Hartl, J. Hegeman, André Holzner, Lorenzo Masetti, F. Meijers, E. Meschi, R. K. Mommsen, Srećko Morović, Carlos Nunez-Barranco-Fernandez, Vivian O’Dell, L. Orsini, Wojciech Ozga, Christoph Paus, Andrea Petrucci, M. Pieri, A. Rácz, Olivier Raginel, Hannes Sakulin, Matteo Sani, Christoph Schwick, Andrei Cristian Spataru, B. Stieger, K. Sumorok, J. Veverka, Christopher Colin Wakefield, P. Zejdl,

Advanced Data Storage Technologies

The DAQ system of the CMS experiment at CERN collects data from more than 600 custom detector Front-End Drivers (FEDs). During 2013 and 2014 the CMS DAQ system will undergo a major upgrade to address the obsolescence of current hardware and the requirements posed by the upgrade of the LHC accelerator and various detector components. For a loss-less data collection from the FEDs a new FPGA based card implementing the TCP/IP protocol suite over 10Gbps Ethernet has been developed. To limit the TCP hardware implementation complexity the DAQ group developed a simplified and unidirectional but RFC 793 compliant version of the TCP protocol. This allows to use a PC with the standard Linux TCP/IP stack as a receiver. We present the challenges and protocol modifications made to TCP in order to simplify its FPGA implementation. We also describe the interaction between the simplified TCP and Linux TCP/IP stack including the performance measurements.