Artigo Revisado por pares

Carry-select adder using single ripple-carry adder

1998; Institution of Engineering and Technology; Volume: 34; Issue: 22 Linguagem: Inglês

10.1049/el

ISSN

1350-911X

Autores

T.-Y. Chang, Meng‐Jie Hsiao,

Tópico(s)

Quantum-Dot Cellular Automata

Resumo

Instead of using dual carry-ripple adders, a carry select adder scheme using an add-one circuit to replace one carry-ripple adder requires 29.2% fewer transistors with a speed penalty of 5.9% for bit length n = 64. If speed is crucial for this 64 bit adder, then two of the original carry-select adder blocks can be substituted by the proposed scheme with a 6.3% area saving and the same speed.

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