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NiSi salicide technology for scaled CMOS

2002; Elsevier BV; Volume: 60; Issue: 1-2 Linguagem: Inglês

10.1016/s0167-9317(01)00684-0

1873-5568

Hiroshi Iwai, T. Ohguro, Shun-ichiro Ohmi,

Nanowire Synthesis and Applications

Salicide is one of the indispensable techniques for high-performance logic devices and its importance increases as the device dimensions become small towards sub-100 nm and hence, the source/drain sheet resistance becomes large. TiSi2 used popularly as the silicide material has been eventually replaced by CoSi2, because of its relatively stable nature during the salicide process. For sub-100-nm technology node, CoSi2 is expected to be further replaced by NiSi. NiSi has several advantages over TiSi2 and CoSi2 for the ultra-small CMOS process. They are (1) low temperature silicidation process, (2) low silicon consumption, (3) no bridging failure property, (4) smaller mechanical stress, (5) no adverse narrow line effect on sheet resistance, (6) smaller contact resistance for both n- and p-Si, and (7) higher activation rate of B for SiGe poly gate electrode. In this paper, NiSi salicide technology is explained.