Portal de Periódicos da CAPES

Fama Architecture: Implementation Details

1987; SPIE; Volume: 0856; Linguagem: Inglês

10.1117/12.943036

1996-756X

A. Alcolea, Ascensión Hernández Martínez, Pablo Laguna, José A. Altabás, T. Pollán, S. J. Vicente, A. Roy,

CCD and CMOS Imaging Sensors

The FAMA (Fine granularity Advanced Multiprocessor Architecture), currently being developed in the Department of Electrical Engineering and Computer Science of the University of Zaragoza, is an SIMD array architecture optimized for computer-vision applications. Because of its high cost-effectiveness, it is a very interesting alternative for industrial systems. Papers describing the processor element of FAMA have been submitted to several conferences; this paper focuses on the rest of components that complete the architecture: controller, I/O interface and software. The controller generates instructions at a 10MHz rate, allowing efficient access to bidimensional data structures. The I/O interface is capable of reordering information for efficient I/O operations. Development tools and modules for classical computer-vision tasks are being worked on in a first stage, the implementation of models based on existing theories on human vision will follow.