Portal de Periódicos da CAPES

A DSP-based video compression test-bed

1997; Elsevier BV; Volume: 20; Issue: 9 Linguagem: Inglês

10.1016/s0141-9331(97)00001-x

1872-9436

Ashraf A. Kassim, F. K. Fong, Kok Seng Chua, S. Rangananth,

Digital Filter Design and Implementation

This paper presents a DSP-based video compression system that was developed to serve as a platform for the testing and implementation of different video compression algorithms. The system consists of three main functional units; the video encoder, the video decoder and the audio codec processor. Each functional unit consists of a Texas Instruments TMS320C30 digital signal processor. A complete implementation of the H.261 video communications standard on the system is also presented.