High speed logic operations of all refractory Josephson integrated circuits
1983; American Institute of Physics; Volume: 43; Issue: 2 Linguagem: Inglês
10.1063/1.94259
ISSN1520-8842
AutoresS. Kosaka, Akira Shoji, Masahiro Aoyagi, Fujitoshi Shinoki, Hiroshi Nakagawa, S. Takada, Hisao Hayakawa,
Tópico(s)Surface and Thin Film Phenomena
ResumoA chain circuit of four-junction logic gates consisting of all refractory junctions with niobium nitride (NbN)-niobium (Nb) double-layered electrodes has been fabricated with a 2.5-μm minimum feature. A reactive ion etching technique has been used for patterning every layer such as junction electrodes, molybdenum resistors, and insulation layers. The minimum logic delay of 18 ps/gate has been obtained in the experimental circuit.
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