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A 10-GB/s SONET-compliant CMOS transceiver with low crosstalk and intrinsic jitter

2004; Institute of Electrical and Electronics Engineers; Volume: 39; Issue: 12 Linguagem: Inglês

10.1109/jssc.2004.835652

1558-173X

H. Werker, Stephan Mechnig, Christophe Holuigue, Christian Ebner, Gerhard Mitteregger, E. Romani, Frederic Roger, Thomas Blon, M. Moyal, M. Vena, A. Melodia, J.E. FISHER, G. Le Grand de Mercey, H. Geib,

Radio Frequency Integrated Circuit Design

A 4:1 SERDES IC suitable for SONET OC-192 and 10-Gb/s Ethernet is presented. The receiver, which consists of a limiting amplifier, a clock and data recovery unit, and a demultiplexer, locks automatically to all data rates in the range 9.95-10.7 Gb/s. At a bit error rate of less than 10/sup -12/, it has a sensitivity of 20 mV. The transmitter comprises a clock multiplying unit and a multiplexer. The jitter of the transmitted data signal is 0.2 ps RMS. This is facilitated by a novel notched inductor layout and a special power supply concept, which reduces cross-coupling between the transmitter and receiver. Integrated in a 0.13-/spl mu/m CMOS technology, the total power consumption from both 1.2- and 2.5-V supplies is less than 1 W.