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A Coarse-Grained Array Accelerator for Software-Defined Radio Baseband Processing

2008; Institute of Electrical and Electronics Engineers; Volume: 28; Issue: 4 Linguagem: Inglês

10.1109/mm.2008.49

1937-4143

Bruno Bougard, Bjorn De Sutter, Diederik Verkest, Liesbet Van der Perre, Rudy Lauwereins,

Parallel Computing and Optimization Techniques

A shrinking energy budget for mobile devices and increasingly complex communication standards make architecture development for software-defined radio very challenging. Coarse-grained array accelerators are strong candidates for achieving both high performance and low power. The C-programmable hybrid CGA-SIMD accelerator presented here targets emerging broadband cellular and wireless LAN standards, achieving up to 100-Mbps throughput with an average power consumption of 220 mW.