Portal de Periódicos da CAPES

Simulation and Fabrication Studies of Semi-superjunction Trench Power MOSFETs by RSO Process with Silicon Nitride Layer

2012; Electronics and Telecommunications Research Institute; Volume: 34; Issue: 6 Linguagem: Inglês

10.4218/etrij.12.0212.0127

2233-7326

Kyoung Il Na,

GaN-based semiconductor devices and materials

ETRI JournalVolume 34, Issue 6 p. 962-965 LetterFree Access Simulation and Fabrication Studies of Semi-superjunction Trench Power MOSFETs by RSO Process with Silicon Nitride Layer Kyoung Il Na, Kyoung Il NaSearch for more papers by this authorSang Gi Kim, Sang Gi KimSearch for more papers by this authorJin Gun Koo, Jin Gun KooSearch for more papers by this authorJong Dae Kim, Jong Dae KimSearch for more papers by this authorYil Suk Yang, Yil Suk YangSearch for more papers by this authorJin Ho Lee, Jin Ho LeeSearch for more papers by this author Kyoung Il Na, Kyoung Il NaSearch for more papers by this authorSang Gi Kim, Sang Gi KimSearch for more papers by this authorJin Gun Koo, Jin Gun KooSearch for more papers by this authorJong Dae Kim, Jong Dae KimSearch for more papers by this authorYil Suk Yang, Yil Suk YangSearch for more papers by this authorJin Ho Lee, Jin Ho LeeSearch for more papers by this author First published: 01 December 2012 https://doi.org/10.4218/etrij.12.0212.0127Citations: 12 Kyoung Il Na (phone: +82 42 860 5324, [email protected]), Sang Gi Kim ([email protected]), Jin Gun Koo ([email protected]), Jong Dae Kim ([email protected]), Yil Suk Yang ([email protected]), and Jin Ho Lee ([email protected]) are with the Convergence Components & Materials Research Laboratory, ETRI, Daejeon, Rep. of Korea. AboutPDF ToolsRequest permissionExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onFacebookTwitterLinkedInRedditWechat Abstract In this letter, we propose a new RESURF stepped oxide (RSO) process to make a semi-superjunction (semi-SJ) trench double-diffused MOSFET (TDMOS). In this new process, the thick single insulation layer (SiO2) of a conventional device is replaced by a multilayered insulator (SiO2/SiNx/TEOS) to improve the process and electrical properties. To compare the electrical properties of the conventional RSO TDMOS to those of the proposed TDMOS, that is, the nitride_RSO TDMOS, simulation studies are performed using a TCAD simulator. The nitride_RSO TDMOS has superior properties compared to those of the RSO TDMOS, in terms of drain current and on-resistance, owing to a high nitride permittivity. Moreover, variations in the electrical properties of the nitride_RSO TDMOS are investigated using various devices, pitch sizes, and thicknesses of the insulator. Along with an increase of the device pitch size and the thickness of the insulator, the breakdown voltage slowly improves due to a vertical field plate effect; however, the drain current and on-resistance degenerate, owing to a shrinking of the drift width. The nitride_RSO TDMOS is successfully fabricated, and the blocking voltage and specific on-resistance are 108 V and 1.1 mΩcm2, respectively. References 1P. Goarin et al., "Split-Gate Resurf Stepped Oxide (RSO) MOSFETs for 25V Applications with Record Low Gate-to-Drain Charge," Proc. ISPSD, 2007, pp. 61– 64. 2G.E.J. Koops et al., "Resurf Stepped Oxide (RSO) MOSFET for 85V Having a Record Low Specific On-Resistance," Proc. ISPSD, 2004, pp. 185– 188. 3Y. Wang et al., "Gate Enhanced Power UMOSFET with Ultralow On-Resistance," IEEE Electron Device Lett., Vol. 31, no. 4, Apr. 2010, pp. 338– 340. 4P. Moens et al., "XtreMOS: The First Integrated Power Transistor Breaking the Silicon Limit," Proc. IEDM. 2006, pp. 1– 4. 5Y.H. Lho and Y.S. Yang, "Design of 100-V Super-Junction Trench Power MOSFET with Low On-Resistance," ETRI J., Vol. 34, no. 1, Feb. 2012, pp. 134– 137. 6W. Saito et al., "High Breakdown Voltage (>1000 V) Semi-Superjunction MOSFETs Using 600-V Class Superjunction MOSFET Process," IEEE Trans. Electron Devices, Vol. 52, no. 10, Oct. 2005, pp. 2317– 2322. 7Y. Miura, H. Ninomiya, and K. Kobayashi, "High Performance Superjunction UMOSFETs with Split P-Columns Fabricated by Multi-Ion-Implantations," Proc. ISPSD, 2005, pp. 39– 42. 8S. Yamauchi et al., "Fabrication of High Aspect Ratio Doping Region by Using Trench Filling of Epitaxial Si Growth," Proc. ISPSD, 2001, pp. 363– 366. 9T. Minato et al., "Which Is Cooler, Trench or Multi-Epitaxy? Cutting-Edge Approach for the Silicon Limit by the Super Trench Power MOS-FET (STM)," Proc. ISPSD, 2000, pp. 73– 76. 10E. Napoli, H. Wang, and F. Udrea, "The Effect of Charge Imbalance on Superjunction Power Devices: An Exact Analytical Solution," IEEE Electron Device Lett., Vol. 29, no. 3, Mar. 2008, pp. 249– 251. 11C.W. Liu, S. Maikap and C.Y. Yu, "Mobility-Enhancement Technologies," IEEE Circuits Devices Mag., Vol. 21, no. 3, May 2005, pp. 21– 36. 12M.A. Gajda et al., "Industrialisation of Resurf Stepped Oxide Technology for Power Transistors," Proc. ISPSD, 2006, pp. 1– 4. Citing Literature Volume34, Issue6December 2012Pages 962-965 ReferencesRelatedInformation