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Programmable DSP architectures. II

1989; Institute of Electrical and Electronics Engineers; Volume: 6; Issue: 1 Linguagem: Inglês

10.1109/53.16934

1558-1284

Edward A. Lee,

Parallel Computing and Optimization Techniques

For pt.I see ibid., vol.5, no.4, p.4-19, Oct. 1988. Three distinct techniques are used for dealing with pipelining, namely, interlocking, time-stationary coding, and data-stationary coding, are examined. These techniques are studied in light of the performance benefit and the impact on the user. Representative DSPs from AT&T, Motorola, and Texas Instruments are used to illustrate the ideas and compare different solutions to the same problems. Trends are discussed, and some predictions for the future are made. >