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Extrinsic and Intrinsic Performance of Vertical InAs Nanowire MOSFETs on Si Substrates

2013; Institute of Electrical and Electronics Engineers; Volume: 60; Issue: 9 Linguagem: Inglês

10.1109/ted.2013.2272324

1557-9646

Karl‐Magnus Persson, Martin Berg, Mattias B. Borg, Jun Wu, Sofia Johansson, Johannes Svensson, Kristofer Jansson, Erik Lind, Lars‐Erik Wernersson,

Advancements in Semiconductor Devices and Circuit Design

This paper presents dc and RF characterization as well as modeling of vertical InAs nanowire (NW) MOSFETs with L G =200 nm and Al 2 O 3 /HfO 2 high-κ dielectric. Measurements at V DS =0.5 V show that high transconductance (g m =1.37 mS/μm), high drive current (I DS =1.34 mA/μm), and low ON-resistance (R ON =287 Ωμm) can be realized using vertical InAs NWs on Si substrates. By measuring the 1/f-noise, the gate area normalized gate voltage noise spectral density, S VG ·L G ·W G , is determined to be lowered by one order of magnitude compared with similar devices with a high-κ film consisting of HfO 2 only. In addition, with a virtual source model we are able to determine the intrinsic transport properties. These devices (L G =200 nm) show a high injection velocity (v inj =1.7×10 7 cm/s) with a performance degradation for array FETs predominantly due to an increase in series resistance.