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An LSI Implementation of an Intelligent CRC Computer and Programmable Character Comparator

1980; Institute of Electrical and Electronics Engineers; Volume: 15; Issue: 1 Linguagem: Inglês

10.1109/jssc.1980.1051338

1558-173X

Alan J. Weissberger,

VLSI and Analog Circuit Testing

Manufacturers of MOS microprocessors have been expanding their product families to include function or task oriented LSI peripheral controllers. In the data communications area, circuits such as universal synchronous/asynchronous receiver/transmitters, bit oriented data link controllers, and multiprotocol handlers have greatly simplified systems design. This paper describes a totally unique device-the polynomial generator checker (WC) that monitors transactions on a data bus and performs functions such as programmable character comparisons, parity generation/checking, and "intelligent" block error generation/checking. An overview of character oriented data link controls and cyclic redundancy check/longitudinal redundancy check (CRC/LRC) provides an introduction to the functions and applications of the PGC. Several innovative architectural constructs be described that enable the device to fit within the die cavity of a 16 pin dual-in-like package.