Portal de Periódicos da CAPES

Single-electron transistor based on a silicon-on-insulator quantum wire fabricated by a side-wall patterning method

2001; American Institute of Physics; Volume: 79; Issue: 23 Linguagem: Inglês

10.1063/1.1421081

1520-8842

Dong Hoe Kim, S.‐K. Sung, Jae Sung Sim, K. R. Kim, J. D. Lee, B.‐G. Park, B. H. Choi, Sungwoo Hwang, D. Ahn,

Molecular Junctions and Nanostructures

We propose and implement a promising fabrication technology for geometrically well-defined single-electron transistors based on a silicon-on-insulator quantum wire and side-wall depletion gates. The 30-nm-wide silicon quantum wire is defined by a combination of conventional photolithography and process technology, called a side-wall patterning method, and depletion gates for two tunnel junctions are formed by the doped polycrystalline silicon sidewall. The good uniformity of the wire suppresses unexpected potential barriers. The fabricated device shows clear single-electron tunneling phenomena by an electrostatically defined single island at liquid nitrogen temperature and insensitivity of the Coulomb oscillation period to gate bias conditions.