A nonvolatile charge-addressed memory (NOVCAM) cell
1975; Institute of Electrical and Electronics Engineers; Volume: 10; Issue: 5 Linguagem: Inglês
10.1109/jssc.1975.1050612
ISSN1558-173X
AutoresM.H. White, D. R. Lampe, J. Fagan, Francis J. Kub, Daniel Barth,
Tópico(s)CCD and CMOS Imaging Sensors
ResumoA nonvolatile charge-addressed memory (NOVCAM) cell is described in a 64-bit shift register configuration. The charge address is performed by a charge-coupled device (CCD) shift register and the information is stored in metal-nitride-oxide-silicon (MNOS) nonvolatile sites located in parallel with the CCD shift register. The tunneling electric field strength across the thin-oxide MNOS structure is controlled by the magnitude of the charge transferred from the CCD register. The write, erase, and read modes of operation are discussed with typical /spl plusmn/20 V 10 /spl mu/s write/erase, and 2 V 2 /spl mu/s read conditions. Readout is accomplished by parallel stabilized charge injection from a diffused p/n junction to minimize access time to the first bit.
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