Artigo Revisado por pares

An analytical back-gate bias effect model for ultrathin SOI CMOS devices

1993; Institute of Electrical and Electronics Engineers; Volume: 40; Issue: 4 Linguagem: Inglês

10.1109/16.202788

ISSN

1557-9646

Autores

J.H. Sim, J.B. Kuo,

Tópico(s)

Quantum and electron transport phenomena

Resumo

An analytical back-gate bias effect model for ultrathin SOI CMOS devices is presented. As verified by PISCES results, the analytical SOI CMOS back-gate bias effect model provides a much better accuracy in the integral potential distribution and the threshold voltage as the back-gate bias is changed. >

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