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Ianus: an adaptive FPGA computer

2006; AIP Publishing; Volume: 8; Issue: 1 Linguagem: Inglês

10.1109/mcse.2006.9

1558-366X

Francesco Belletti, Isabel Campos, A. Maiorano, S.P. Gavir, D. Sciretti, A. Tarancón, J. L. Velasco, Andres Cruz Flor, D. Navarro, Pedro Téllez, L. A. Fernández, V. Martı́n-Mayor, A. Muñoz Sudupe, S. Jiménez, Enzo Marinari, Filippo Mantovani, G. Poll, Sebastiano Fabio Schifano, L. Tripiccione, J. J. Ruiz-Lorenzo,

Algorithms and Data Compression

With Ianus, a next-generation field-programmable gate array (FPGA)-based machine, the authors hope to build a system that can fully exploit the performance potential of FPGA devices. A software platform that simplifies Ianus programming will extend its intended application range to a wide class of interesting and computationally demanding problems.