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An active clamp circuit for voltage regulation module (VRM) applications

2001; Institute of Electrical and Electronics Engineers; Volume: 16; Issue: 5 Linguagem: Inglês

10.1109/63.949495

1941-0107

Albert Wu, S.R. Sanders,

Analog and Mixed-Signal Circuit Design

This paper discusses the design, fabrication, and testing of a CMOS active clamp circuit, The active clamp is a linear voltage regulator, with a voltage deadband to allow for voltage ripple, that is designed to operate in parallel with a switchmode voltage regulator. Its specific function is to sink or source large transient currents to microprocessor loads, thus allowing operation with very small output capacitance. Laboratory tests on a prototype IC exhibit stable behavior with negligible overshoot with only 47 microfarads of output capacitance with loads of about nine amperes. Output impedances of 2-3 m/spl Omega/ are achieved.