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A multimicroprocessor architecture for real-time computation of a class of DFT algorithms

1986; Institute of Electrical and Electronics Engineers; Volume: 34; Issue: 5 Linguagem: Inglês

10.1109/tassp.1986.1164924

0096-3518

Veljko Milutinović, J.A.B. Fortes, Leah H. Jamieson,

Parallel Computing and Optimization Techniques

The design of a multimicroprocessor system intended for a class of real-time processing applications is discussed. The applications considered require the computation of a subset of an N-input Fourier transform under the assumption of a serial data input. The suitability of two different algorithms and the corresponding parallel architectures is analyzed and compared. More specifically, we compare the computation of the FFT algorithms on an SIMD (single instruction multiple data) machine to the implementation of the DFT algorithm on an MISD (multiple instruction single data) machine. Our results indicate that the latter is better suited for the targeted applications. An actual operational MISD computer, implemented with off-the-shelf microprocessors intended for one of the targeted applications, is described.