A pipelined multiranging integrator and encoder ASIC for fast digitization of photomultiplier tube signals
1992; Office of Scientific and Technical Information; Linguagem: Inglês
Autores
R. Yarema, G. W. Foster, J. Hoff, M. Sarraj, T. Zimmerman,
Tópico(s)Analog and Mixed-Signal Circuit Design
ResumoA new full custom chip is being designed using the Orbit 2 micron ``BiCMOS`` process to provide a wide range fast digital readout of Photomultiplier Tubes. The goal is to obtain a digitized PMT signal with a 18--20 bit dynamic range and 8 bits of accuracy in a floating point number format every 16 ns. The chip is DC coupled to a PMT and uses a four-way gated integrator and encoder to form a 4 bit binary number which is the exponent of the floating point number. Simultaneous processing of the PMT signal on binary weighted scales provides a pipelined analog signal to a single FADC which generates the floating point number mantissa. The current state of development of this new chip and results from several test chips are presented in this paper. 3 refs.
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