Artigo Revisado por pares

A 1.8-GHz CMOS low-phase-noise voltage-controlled oscillator with prescaler

1995; Institute of Electrical and Electronics Engineers; Volume: 30; Issue: 12 Linguagem: Inglês

10.1109/4.482195

ISSN

1558-173X

Autores

Jan Craninckx, Michiel Steyaert,

Tópico(s)

Semiconductor Lasers and Optical Devices

Resumo

The implementation of the two high-frequency building blocks for a low-phase-noise 1.8-GHz frequency-synthesizing PLL in a standard 0.7-/spl mu/m CMOS process is discussed. The VCO uses on-chip bondwires, instead of spiral inductors, for low noise and low power. The design of these bondwire inductors is discussed in great detail. A general formula for the theoretical limit of the phase noise of LC-tuned oscillators is presented. The design of a special LC-tank allows a trade-off between noise and power. The realized VCO has a phase noise of -115 dBc/Hz at 200 kHz from the 1.8-GHz carrier and consumes 8 mA from a 3-V supply. The prescaler has a fixed division ratio of 128 and uses an enhanced ECL-alike high-frequency D-flipflop. Its power consumption is 28 mW.

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