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Enhanced Write Performance of a 64-Mb Phase-Change Random Access Memory

2005; Institute of Electrical and Electronics Engineers; Volume: 41; Issue: 1 Linguagem: Inglês

10.1109/jssc.2005.859016

ISSN

1558-173X

Autores

H. Oh, B. Cho, W.Y. Cho, Sung Min Kang, Byung Joon Choi, Hyeongmo Kim, Kuisoon Kim, Dongjae Kim, Chanyeong Kwak, Hye Ryung Byun, Giho Jeong, Hongsik Jeong, Kuisoon Kim,

Tópico(s)

Photoreceptor and optogenetics research

Resumo

The write performance of the 1.8-V 64-Mb phase-change random access memory (PRAM) has been improved, which was developed based on 0.12-/spl mu/m CMOS technology. For the improvement of RESET and SET distributions, a cell current regulator scheme and multiple step-down pulse generator were employed, respectively. The read access time and SET write time are 68 ns and 180 ns, respectively.

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