Portal de Periódicos da CAPES

Measurements and modeling of MOSFET I-V characteristics with polysilicon depletion effect

1993; Institute of Electrical and Electronics Engineers; Volume: 40; Issue: 12 Linguagem: Inglês

10.1109/16.249483

1557-9646

C.-L. Huang, N.D. Arora,

Silicon Carbide Semiconductor Technologies

The authors study the degradation of MOSFET current-voltage (V-I) characteristics as a function of polysilicon gate concentration (N/sub p/), oxide thickness (t/sub ox/) and substrate impurity concentration (N/sub D/) using measured and modeled results. Experimentally it is found that for MOSFETs with thin gate oxide (t/sub ox/ approximately=70 AA) and high substrate concentration (N/sub D/ approximately=1.6*10/sup 17/ cm/sup -3/) the reduction in the drain current I/sub DS/ can be as large as 10% to 20% for devices with insufficiently doped polysilicon gate (5*10/sup 18/<or=N/sub p/<or=1.6*10/sup 19/ cm/sup -3/). Theoretically it is shown that the drain current degradation becomes more pronounced as N/sub p/ decreases, t/sub ox/ decreases, or N/sub D/, increases. A modified Pao-Sah model that takes into account the polysilicon depletion effect and an accurate gate-field-dependent mobility model are used to compute I-V characteristics for various values of N/sub p/, t/sub ox/, and N/sub D/. Good agreement between experimental and modeled results is observed over a wide range of devices. >