Feasibility of Embedded DRAM Cells on FinFET Technology
2014; Institute of Electrical and Electronics Engineers; Volume: 65; Issue: 4 Linguagem: Inglês
10.1109/tc.2014.2375204
ISSN2326-3814
AutoresE. Amat, Antonio Calomarde, Francesc Moll, Ramón Canal, Antonio Rubio,
Tópico(s)Low-power high-performance VLSI design
ResumoIn this paper, we analyze the suitability of implementing embedded DRAM (eDRAM) cells on FinFET technology compared to classical planar MOSFETs. The results show a significant improvement in overall cell performance for multi-gate devices. While pFinFET-based memories showed better cell behavior and variability robustness, mixed n/pFinFET cells had the highest working frequency and a negligible impact on degradation. Finally, we show that a multiple fin-height strategy can be used to reduce the layout area of the eDRAM cells (>10%).
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