Capacitor‐sharing two‐output series‐resonant inverter for induction cooking application
2016; Institution of Engineering and Technology; Volume: 9; Issue: 11 Linguagem: Inglês
10.1049/iet-pel.2016.0114
ISSN1755-4543
AutoresDevara Vijaya Bhaskar, N. Vishwanathan, Tanmoy Maity, S Porpandiselvi,
Tópico(s)Multilevel Inverters and Converters
ResumoIET Power ElectronicsVolume 9, Issue 11 p. 2240-2248 Research ArticlesFree Access Capacitor-sharing two-output series-resonant inverter for induction cooking application Vijaya Bhaskar Devara, Vijaya Bhaskar Devara Electrical Engineering Department, Indian School of Mines, Dhanbad, Bihar, 826004 IndiaSearch for more papers by this authorVishwanathan Neti, Vishwanathan Neti Department of Electrical Engineering, NIT Warangal, Warangal, Andhra Pradesh, 506004 IndiaSearch for more papers by this authorTanmoy Maity, Tanmoy Maity Department of Mining Machinery Engineering, Indian School of Mines, Dhanbad, Jharkhand, 826004 IndiaSearch for more papers by this authorPorpandiselvi Shunmugam, Corresponding Author Porpandiselvi Shunmugam porpandiselvi@gmail.com Department of Electrical Engineering, NIT Warangal, Warangal, Andhra Pradesh, 506004 IndiaSearch for more papers by this author Vijaya Bhaskar Devara, Vijaya Bhaskar Devara Electrical Engineering Department, Indian School of Mines, Dhanbad, Bihar, 826004 IndiaSearch for more papers by this authorVishwanathan Neti, Vishwanathan Neti Department of Electrical Engineering, NIT Warangal, Warangal, Andhra Pradesh, 506004 IndiaSearch for more papers by this authorTanmoy Maity, Tanmoy Maity Department of Mining Machinery Engineering, Indian School of Mines, Dhanbad, Jharkhand, 826004 IndiaSearch for more papers by this authorPorpandiselvi Shunmugam, Corresponding Author Porpandiselvi Shunmugam porpandiselvi@gmail.com Department of Electrical Engineering, NIT Warangal, Warangal, Andhra Pradesh, 506004 IndiaSearch for more papers by this author First published: 01 September 2016 https://doi.org/10.1049/iet-pel.2016.0114Citations: 5AboutSectionsPDF ToolsRequest permissionExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onFacebookTwitterLinkedInRedditWechat Abstract Induction heating (IH) technique has been widely used in industrial and domestic heating applications. In IH cooking applications, multi-output IH systems are increasing in demand. In this study, an inverter configuration is proposed for two-output IH cooking applications. The objective of this proposal is to reduce the component count and thereby the size of the circuit and cost. In this proposed configuration, two IH loads are connected to a full-bridge inverter output and these loads are sharing a common resonant capacitor. The output power is controlled using on–off control. Switching losses are reduced due to zero voltage switching operation. The two loads are independently controlled with high efficiency. The control logic of the proposed system is described in detail and prototype is designed, implemented and the validity is verified through experimental and simulation results. 1 Introduction Induction heating (IH) plays a major role in industrial heating applications. It is a non-contact heating process and the heat is generated in the material itself [1]. IH technique is rapidly replacing the conventional heating methods used in industrial heating processes like welding, annealing, melting, surface hardening, and also in domestic cooking [2]. IH works on the principle of electromagnetic induction. In IH, an alternating magnetic field is produced by a high-frequency current carrying coil, placed around or below the specimen to be heated. This alternating magnetic field induces emf and thereby eddy currents in the specimen. These eddy currents are heating the specimen due to I2R losses [1-3]. The IH system is modelled as a transformer with short-circuited single-turn secondary winding. Hence, the IH load can be represented as a series combination of equivalent inductance Leq and resistance Req, where Leq and Req are the equivalent inductance and resistance of the load as seen from the work coil [4]. Electromagnetic field analysis softwares can be used in modelling the IH load system [5, 6]. IH applications are operated with high-frequency inverters. The frequency range used in IH cooking applications is 20–150 kHz. Power metal–oxide–semiconductor field-effect transistors (MOSFETs) are preferable switching devices in this range. IH load has inherently a poor power factor. For this reason, the load is resonated by adding a resonant capacitor in series with IH load to improve the power factor. Hence, resonant inverters are used in supplying power to the induction coil at the desired frequency [7-9]. The commonly used inverter topologies in IH cooking applications are half-bridge [10-12] and full-bridge [13]. In some IH inverter circuits, output power is controlled by varying the switching frequency [14]. Variable frequency control is not a good solution in IH applications. It has several limitations like electromagnetic interference (EMI), low efficiency of the inverter and so on. These problems can be overcome by using fixed frequency control. The control techniques used with constant frequency operation are phase shift control (PSC) [15], asymmetrical duty cycle (ADC) [16], asymmetrical voltage cancellation (AVC) [17] and pulse density modulation (PDM) control [18, 19]. Among the above control techniques, PSC, ADC and AVC are duty cycle control methods, whereas PDM technique is on–off control [20]. In IH cooking applications, one load is powered by single inverter. Hence, for multiple loads, multiple inverters may be required. Disadvantages of this method are larger size, more number of components and high cost. An alternative solution for multiple loads is using a single inverter topology which can supply multiple loads. This method will be cost effective. Hence, for multi-output IH applications, there is a need for development of inverter topologies and control techniques. In the literature, some single inverter topologies are available for multi-output IH system. In [21], a multi-load single converter system is proposed for low-power IH application. Single inverter is powering two series-resonant loads consisting of IH coils and resonant capacitors. First load is considered as master load and its power control is achieved by varying the switching frequency. Power in second load is controlled by changing the value of resonant capacitor. This is done by changing the number of capacitors connected in parallel by activating corresponding electromechanical switches. However, variable frequency control and use of electromechanical switches may lead to acoustic noise and EMI problems. A two-output series-resonant inverter has been proposed in [22]. The load powers are controlled by asymmetric voltage cancellation control method. Simultaneous and independent output control is achieved. In [23], two topologies for frequency synchronised resonant converters are proposed for multi-winding IH applications. In the first topology, a half-bridge inverter configuration with three switches is proposed to control two IH loads. Power in first coil is controlled by variable frequency control method and the second coil output power is controlled by duty cycle control. In the second topology, two half bridges are associated in a full-bridge configuration in order to reduce switching device stresses. Both loads are operated at constant frequency. However, the presence of average current in the induction coil and losses due to diode conduction makes these topologies suitable only for low-power applications. A two-output full-bridge high-frequency inverter is proposed with power factor improvement in [24]. Boost circuit in discontinuous conduction mode operation is used as power factor correction unit. Two switches of the inverter are shared by this boost circuit. AVC control is used for output power control. In [25], multi-load control is achieved using electromechanical relays which leads to EMI and acoustic noise problems. In [26], matrix converter is proposed for multi-output IH applications. PDM control is used for individual load power control. This topology has the combined advantages of matrix converter and series-resonant multi-inverter. The limitation of this circuit is increased current harmonics under unbalanced operation of the circuit. Hence, proper design of electromagnetic compatibility filter is required. Discontinuous mode operation based control strategies have been proposed in [27] to improve converter performance at light-load conditions for multi-load systems. There are limited number of circuits available in the literature for multi-output IH. Each circuit has its own advantages and limitations. This paper aims at introducing a resonant inverter configuration for the above said application with low component count and simple control. In this paper, a series-resonant inverter configuration is proposed for two-output IH cooking application. In this topology, a full-bridge inverter is operated with on–off control strategy and is supplying power to two IH coils. Conventionally, for each load coil, a resonant capacitor is required in IH applications. However, in the proposed topology, a single resonant capacitor is shared by two loads. Both the loads are operating simultaneously at same frequency. By using on–off control technique, wide range of output power control is achieved with high efficiency. The number of devices used in the proposed topology is less compared with the existing two-output IH cooking systems. Thus, cost of the system will be reduced. 2 Proposed inverter topology The proposed capacitor-sharing dual-output IH system is shown in Fig. 1a. Load-1, load-2 and resonant capacitor (Cr) are connected in series across the output terminals (A and B) of a full-bridge inverter. The output voltage of inverter is vAB. S1, S2, S3 and S4 are switching devices of the inverter, S5 and S6 are back-to-back connected switches and this switch pair is named as Sb and similarly S7 and S8 switch pair is named as Sa. These switch pairs Sa and Sb are connected across load-2 and load-1, respectively. Sa and Sb can conduct in either direction when the corresponding switches S5 and S6 or S7 and S8 are on. Also they do not conduct when the corresponding switches are off. In the proposed configuration, the switching devices used are power MOSFETs with low on-state resistance. Fig. 1Open in figure viewerPowerPoint Proposed dual-output capacitor-sharing inverter a Circuit diagram b Equivalent circuit The equivalent circuit of the proposed configuration is shown in Fig. 1b, where Leq1 and Req1 are equivalent inductance and resistance of the IH coil and vessel of IH load-1 referred to coil side, respectively. Similarly, Leq2 and Req2 are, respectively, the equivalent inductance and resistance of the IH coil and vessel of the IH load-2 referred to the coil side. A single capacitor Cr is connected in series with two loads. In the proposed configuration, IH load-1 and IH load-2 are selected to be identical. Hence, the equivalent inductance of the IH loads are Leq1 = Leq2 = Leq and resistance of the IH loads are Req1 = Req2 = Req. IH load-1 and capacitor Cr are forming resonant load-1 and IH load-2 and same capacitor Cr are forming resonant load-2. As the load parameters are equal, the resonant frequencies of load-1 and load-2 are same and is expressed as The inverter switching frequency (fs) is selected to be slightly above the resonant frequency (fr) in order to achieve zero voltage switching (ZVS) and hence high efficiency. In the proposed configuration, inverter is operating at a constant frequency of 30 kHz. 3 Modes of operation Switching devices of the inverter are controlled by high-frequency switching pulses vg1 − vg4 and generate a square wave output voltage. The load control switch pairs Sa and Sb are switched at low frequency. Their switching pulses vga and vgb are generated at 900 Hz with 0.5 duty cycle and they are complementary to each other. The proposed inverter operation can be divided into four modes. The equivalent circuits of the inverter load circuit during different modes are shown in Fig. 2. Mode-1: During mode-1, switch pair Sa is on and switch pair Sb is off. Hence, load-2 is short circuited and load-1 and Cr are connected across the inverter terminals. Series combination of load-1 and Cr forms resonant load-1. High-frequency inverter output voltage is applied across resonant load-1 and it draws a sinusoidal current. Hence, IH coil-1 is powered during this mode. The amount of power supplied to IH coil-1 depends on the duration of this mode. io1 is the load-1 current in this mode. Fig. 2Open in figure viewerPowerPoint Load equivalent circuit during different modes of operation a Mode-1 b Mode-2 c Mode-3 d Mode-4 Mode-2: During mode-2, Sa and Sb remain in same switching states as during mode-1. Before powering load-2, the energy stored in Leq1 should be transferred to the load. To achieve this, inverter switches S1 and S3 are kept in 'on-state' while S2 and S4 are in 'off-state'. Inverter output voltage vAB = 0. Energy in Leq1 is free wheeled through S1 and S3. The current in IH coil-1 becomes zero during this mode. Mode-3: Switch pair Sa is turned off and switch pair Sb is on. Hence, load-1 is short circuited and load-2 and Cr are connected across the inverter terminals. Series combination of load-2 and Cr forms resonant load-2. High-frequency inverter output voltage is applied across resonant load-2 and it draws a sinusoidal current. Thus, during this mode, high-frequency current flows through IH coil-2 and load-2 is powered. io2 is the load-2 current in this mode. Mode-4: Mode-4 operation is similar to that of mode-2. Sa and Sb remain in same switching states as during mode-3. S1 and S3 are in 'on-state' and S2 and S4 are in 'off-state'. Inverter output voltage vAB = 0. During this mode energy stored in Leq2 is transferred to the load through S1 and S3. The current in IH coil-2 reduces to zero. 4 Control circuit design The block diagram of the control circuit is shown in Fig. 3a. UC3875 PWM integrated circuit (IC) is used to generate the inverter switching pulses. This IC generates switching pulses at a frequency of 30 kHz. The switching pulses vga and vgb for load control devices Sa and Sb, respectively, are derived from another control IC SG3525 at a frequency of 900 Hz. These pulses are complementary to each other with 50% duty cycle. On–off control pulses v1 and v2 are derived from 555 timer ICs. These pulses v1 and v2 are synchronised with vga and vgb, respectively. The on duration of v1 and v2 are ton1 and ton2, respectively. The durations for which load-1 and load-2 are powered is controlled by ton1 and ton2, respectively. v1 and v2 are logically combined with 3875 output pulses to generate switching pulses of inverter devices (vg1, vg2, vg3 and vg4). IR2110 and HCPL 3120 are the driver ICs used. Switching pulses to inverter devices, load control devices and on–off control pulses are shown in Fig. 3b. Experimental switching pulses vga and vgb and on–off control pulses v1 and v2 are shown in Fig. 3c. Fig. 3Open in figure viewerPowerPoint Control circuit a Block diagram b Switching pulses c Experimental switching pulses vga, vgb, v1 and v2 As shown in Fig. 3b, when vga and v1 are high, inverter switching pulses are generated corresponding to mode-1 operation. In this duration, load-1 is powered by the inverter. When vga is high and v1 is low, the switching pulses generated are corresponding to mode-2 operation. Now vg2 and vg4 are low, and vg1 and vg3 are maintained at high level. With this switching pattern upper switching devices S1 and S3 are on and lower devices S2 and S4 are off. Inverter output voltage vAB = 0 and energy in load-1 freewheels through S1 and S3. When vgb and v2 are high, the switching pulses are generated corresponding to mode-3 operation during which load-2 is powered. When vgb is high and v2 is low, the switching pulses are generated for mode-4 operation which is identical to mode-2 operation. Inverter output voltage vAB = 0 and energy in load-2 freewheels through S1 and S3. 5 Output power control In the proposed capacitor-shared dual-output IH system, on–off control is used to control load power. The loads are alternatively supplied, for duration of T/2, where T is the switching period of the devices Sa and Sb. These devices are switched at 900 Hz. When Sa is on, load-1 is connected to inverter output voltage vAB and when Sb is on, load-2 is supplied with vAB. The load output powers are independently controlled by on–off control technique. The duration for which voltage is applied to loads is controlled by the on duration of control pulses v1 and v2. The duty cycles of load-1 and load-2 are expressed as and d2 = ton2/(T/2), respectively. During ton1, Sa is on and load-2 is bypassed through Sa. Hence, load-1 is connected to the inverter output and output current io1 flows through load-1. In the next half cycle, Sb is on and during ton2, VAB is applied to load-2 and a current of io2 flows through load-2. By varying ton1 and ton2, respective duty cycles d1 and d2 are varied, thereby the output powers of load-1 and load-2 can be controlled accordingly. The waveforms of vga, vgb, v1, v2, corresponding inverter output voltage VAB and load currents are shown in Fig. 4 for different combinations of duty cycles d1 and d2. For d1 = d2 = 0.48, the output powers to load-1 and load-2 are maximum as seen in Fig. 4a. Fig. 4b shows the outputs for d1 = 0.2, d2 = 0.48 and Fig. 4c shows outputs corresponding to d1 = 0.48, d2 = 0.35. From this figure, it is seen that the density of output voltage pulses and current to the loads are changing according to corresponding duty cycles of the loads. This shows that independent output power control is possible with this proposed topology. Fig. 4Open in figure viewerPowerPoint Fig. 4 (continued)Open in figure viewerPowerPoint In the proposed circuit, load-1 and load-2 currents become zero during toff1 and toff2, respectively, where toff1 = (T/2)–ton1 and toff2 = (T/2)–ton2. The condition for this operation is, toff1 ≫ τ and toff2 ≫ τ, where characteristic delay time of load circuit . With on–off control [18], output power is proportional to the pulse density duty cycle when T ≫ τ. The peak value of fundamental component of inverter output voltage (vAB) is expressed as (1) (2) (3)Total output power of the inverter, Po = Po1 + Po2 (4)where Io1 is rms load current of load-1 during mode-1, Io2 is rms load current of load-2 during mode-3. d1 and d2 are duty cycles of load-1 and load-2, respectively. 6 Experimental and simulation results A 138 W prototype of dual-output inverter with capacitor sharing has been implemented for IH cooking application. The experimental setup is shown in Fig. 5a. The circuit parameters used are shown in Table 1. The input voltage VDC = 25 V. The equivalent load-1 and load-2 parameters are measured from the coil side with the vessels kept over the IH coils. The load parameters are chosen to be identical. Hence, the resonant frequencies of resonant load-1 and resonant load-2 are same. The inverter switching frequency is 30 kHz and resonant frequency of the load is 29.09 kHz. As fs > fr, the series-resonant load circuit operates effectively in inductive mode. Hence, load current lags behind the output voltage and makes turn off current positive in the switching devices. This ensures ZVS in each cycle of operation in the proposed inverter configuration. Fig. 5b shows experimental waveforms of output voltage and load currents when load-1 is on. It is observed that ZVS is maintained during the operation. During load-2 operation also ZVS exists due to the similar load parameters. Table 1. Parameters of proposed dual-load configuration Description Symbol Value source voltage VDC 25 V equivalent resistance of each load Req1 = Req2 = Req 1.96 Ω equivalent inductance of each load Leq1 = Leq2 = Leq 68 μH resonant capacitor of the circuit (2 × 0.22 μF = 0.44 μF) Cr 0.44 μF resonant frequency of the each load fr 29.09 kHz switching frequency of the circuit fs 30 kHz MOSFETs used IRFP4110PbF 100 V, 180 A, rDS = 3.7 mΩ control ICs UC3875, SG3525 and 555 timer driver IC IR2110 and HCPL3120 Fig. 5Open in figure viewerPowerPoint Experimental setup and waveforms showing ZVS a Experimental setup for two-output IH cooking system b Experimental waveforms of inverter output voltage and output currents Load-1 and load-2 output powers are independently controlled by on–off control technique. The simulation and experimental results are shown for different combinations of load-1 and load-2 duty cycles d1 and d2, respectively. Fig. 6 shows the simulation and experimental waveforms of the inverter at d1 = d2 = 0.45. Fig. 6a shows the simulation waveforms of vAB and io1. Fig. 6b shows experimental waveforms of inverter output voltage vAB and io1. Figs. 6c and d show the simulation and experimental waveforms of inverter output voltage vAB and io2. Fig. 6Open in figure viewerPowerPoint Simulation and experimental waveforms at d1 = d2 = 0.45 a Simulation waveforms of vAB and io1 b Experimental waveforms of vAB and io1 (scale: voltage: 25 V/div, current: 10 A/div) c Simulation waveforms of vAB and io2 d Experimental waveforms of vAB and io2 (scale: voltage: 25 V/div, current: 10 A/div) Fig. 7 shows the simulation and experimental waveforms of load-1 current (io1) and load-2 current (io2) for d1 = d2 = 0.25. Fig. 8 shows the simulation and experimental waveforms for load-1 current (io1) and load-2 current (io2) for d1 = 0.36 and d2 = 0.25, respectively. From Figs. 6-8, it is observed that the maximum value of the load currents are equal and remaining same for any value of duty cycle. However, the duration of this current waveform changes according to the corresponding duty cycle. Hence, the output currents and corresponding output powers can be controlled by varying duty cycles. Thus, two loads are independently controlled by varying corresponding duty cycle. It is also observed that experimental results are in good agreement with the simulation results. Fig. 7Open in figure viewerPowerPoint Simulation and experimental waveforms at d1 = d2 = 0.25 a Simulation waveforms of io1 and io2 b Experimental waveforms of io1 and io2 (scale: current: 10 A/div) Fig. 8Open in figure viewerPowerPoint Simulation and experimental waveforms at d1 = 0.36 and d2 = 0.25 a Simulation waveforms of io1 and io2 b Experimental waveforms of io1 and io2 (scale: current: 10 A/div) 7 Analysis of results and overall efficiency In the proposed single capacitor-sharing dual-output inverter, power control is achieved through on–off control. The plot of load currents against load-1 duty cycle (d1) is shown in Fig. 9a. It can be observed that load-1 current is varying with its duty cycle d1 and load-2 current remains almost constant. Simulation and experimental results are in good agreement with each other. Similarly, load-1 and load-2 currents with varying load-2 duty cycle (d2) are shown in Fig. 9b. It can be observed that load-2 current is varying with its duty cycle d2 and load-1 current remains almost constant. It is also observed that simulation and experimental results are in good agreement with each other. Hence, independent control of load-1 and load-2 currents is possible with this circuit, where single resonant capacitor is shared by two loads. Fig. 9Open in figure viewerPowerPoint Load currents against duty cycle a io1 and io2 against load-1 duty cycle (d1) b io1 and io2 against load-1 duty cycle (d2) The total inverter output power is the sum of output powers of load-1 (Po1) and load-2 (Po2). The output power is calculated based on (4). The input power of the inverter is calculated as the product of input voltage (VDC) and input current (IDC) of the inverter. Overall efficiency is calculated from the total output power and input power. Overall efficiency curves of the proposed inverter are shown in Figs. 10a and b. In Fig. 10a, load-1 output power is varied while load-2 output power is kept constant. In Fig. 10b, load-2 output power is varied while load-1 output power kept constant. It can be observed that the overall efficiency remains considerably high for wide variation of duty cycle under both situations. Fig. 10Open in figure viewerPowerPoint Overall efficiency against duty cycle a Overall efficiency against load-1 duty cycle (d1) b Overall efficiency against load-2 duty cycle (d2) As the number of resonant capacitors is reduced in the proposed configuration, cost is also reduced as compared with dual-load IH inverters which are using two resonant capacitors. The number of switching devices used is same as that of two inverter circuits. However, the switching loss in Sa and Sb is less due to low operating frequency (900 Hz). Hence, the efficiency is higher than two inverter topologies for IH applications. The proposed system is simple, cost effective and also has higher efficiency and wider range of power control. The proposed configuration can be extended for more than two loads also. 8 Conclusion In this paper, a two-load inverter for IH application has been proposed with a single resonant capacitor shared by both loads. This proposed IH system possesses many advantages compared with the existing two-load IH inverter circuits. The number of passive components used in the proposed circuit is less, as single capacitor is used for two loads. Reduction in the number of resonant capacitors used leads to decrease in the cost of the proposed system. As the switching devices used in switching pairs Sa and Sb are operating at low frequency, the switching losses are less and can be ignored. The control technique used is also simple and effective. Independent load power control is achieved in the proposed circuit. The proposed circuit has been implemented and the experimental and simulation results are found to be in good agreement with each other. High efficiency is achieved over wide on–off control ranges due to ZVS operation of the switching devices. The proposed system is designed for two-load IH cooking application but the design can be implemented for higher number of loads also. It can be used for more number of loads with considerable reduction of overall cost. 9 References 1Lucıa O., Maussion P., and Dede E.: 'Induction heating technology and its applications: past developments, current technology, and future challenges', IEEE Trans. Ind. Electron., 2014, 61, (5), pp. 2509– 2520 (doi: http://doi.org/10.1109/TIE.2013.2281162) 2Porpandiselvi S., and Vishwanathan N.: 'Three-leg inverter configuration for simultaneous dual-frequency induction hardening with independent control', IET Power Electron. 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