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Integration of GaAs, GaN, and Si-CMOS on a common 200 mm Si substrate through multilayer transfer process

2016; Institute of Physics; Volume: 9; Issue: 8 Linguagem: Inglês

10.7567/apex.9.086501

1882-0786

Kwang Hong Lee, Shuyu Bao, Li Zhang, David Kohen, Eugene A. Fitzgerald, Chuan Seng Tan,

Nanowire Synthesis and Applications

Abstract The integration of III–V semiconductors (e.g., GaAs and GaN) and silicon-on-insulator (SOI)-CMOS on a 200 mm Si substrate is demonstrated. The SOI-CMOS donor wafer is temporarily bonded on a Si handle wafer and thinned down. A second GaAs/Ge/Si substrate is then bonded to the SOI-CMOS-containing handle wafer. After that, the Si from the GaAs/Ge/Si substrate is removed. The GaN/Si substrate is then bonded to the SOI–GaAs/Ge-containing handle wafer. Finally, the handle wafer is released to realize the SOI–GaAs/Ge/GaN/Si hybrid structure on a Si substrate. By this method, the functionalities of the materials used can be combined on a single Si platform.