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SAMPA Chip: the New 32 Channels ASIC for the ALICE TPC and MCH Upgrades

2017; Institute of Physics; Volume: 12; Issue: 04 Linguagem: Inglês

10.1088/1748-0221/12/04/c04008

ISSN

1748-0221

Autores

Jonatan Adolfsson, Armando Ayala Pabón, M. Bregant, C.L. Britton, G. Brulin, Dionísio Carvalho, V. Chambert, D. D. Chinellato, B. Espagnon, Hugo Hernández, T. Ljubičić, S. M. Mahmood, U. Mjörnmark, D. Moraes, M. G. Munhoz, Gerard Eyre Noel, A. Oskarsson, L. Österman, A. Pilyar, K. F. Read, A. Ruette, Paolo Russo, Bruno Sanches, Lucas Compassi-Severo, D. Silvermyr, C. Suire, Ganesh Jagannath Tambave, K.M.M. Tun-Lanoë, Wilhelmus Van Noije, A. Velure, S. Vereschagin, E. Wanlin, Tiago Oliveira Weber, S. Zaporozhets,

Tópico(s)

Particle physics theoretical and experimental studies

Resumo

This paper presents the test results of the second prototype of SAMPA, the ASIC designed for the upgrade of read-out front end electronics of the ALICE Time Projection Chamber (TPC) and Muon Chamber (MCH). SAMPA is made in a 130 nm CMOS technology with 1.25 V nominal voltage supply and provides 32 channels, with selectable input polarity, and three possible combinations of shaping time and sensitivity. Each channel consists of a Charge Sensitive Amplifier, a semi-Gaussian shaper and a 10-bit ADC; a Digital Signal Processor provides digital filtering and compression capability. In the second prototype run both full chip and single test blocks were fabricated, allowing block characterization and full system behaviour studies. Experimental results are here presented showing agreement with requirements for both the blocks and the full chip.

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