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Design and Implementation of Microprocessor Trainer Bus System

2017; IJARIT Research Foundation; Volume: 3; Issue: 6 Linguagem: Inglês

2454-132X

Tin Tin Nwet, Phyu Phyu Shein,

Embedded Systems Design Techniques

This paper presents a part of a microprocessor trainer system. This paper has six modules. All modules are connected on the bus paths. Control signal such as Direct Memory Access (DMA), I/O Module and memory Modules are attached to the bus. In this paper, the bus has four lines of the bus. They are a line of the address, data, control (Memory Read/ Write and I/O Read/Write) and power. The address bus and data bus are 16 bits. Several Microcontrollers are in this paper. PIC 16f877 is used in a DMA module (direct memory access) and I/O module. PIC 74LS573 is applied as Latch, PIC74LS244 is used as a bus driver and PIC74LS255 is applied as a bus transceiver. PIC18f452 is used in CPU module. Each type of bus has its own requirements and properties.