Portal de Periódicos da CAPES

Implementation of a high precision multi-measurement time-to-digital convertor on a Kintex-7 FPGA

2018; Elsevier BV; Volume: 891; Linguagem: Inglês

10.1016/j.nima.2018.02.064

1872-9576

Jie Kuang, Yonggang Wang, Qiang Cao, Chong Liu,

Analog and Mixed-Signal Circuit Design

Time-to-digital convertors (TDCs) based on field programmable gate array (FPGA) are becoming more and more popular. Multi-measurement is an effective method to improve TDC precision beyond the cell delay limitation. However, the implementation of TDC with multi-measurement on FPGAs manufactured with 28 nm and more advanced process is facing new challenges. Benefiting from the ones-counter encoding scheme, which was developed in our previous work, we implement a ring oscillator multi-measurement TDC on a Xilinx Kintex-7 FPGA. Using the two TDC channels to measure time-intervals in the range (0 ns–30 ns), the average RMS precision can be improved to 5.76 ps, meanwhile the logic resource usage remains the same with the one-measurement TDC, and the TDC dead time is only 22 ns. The investigation demonstrates that the multi-measurement methods are still available for current main-stream FPGAs. Furthermore, the new implementation in this paper could make the trade-off among the time precision, resource usage and TDC dead time better than ever before.