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Trends in High‐Performance Interconnection Networks in the Exascale and Big‐Data Era (HiPINEB 2017)

2018; Wiley; Volume: 31; Issue: 2 Linguagem: Inglês

10.1002/cpe.5041

1532-0634

Jesús Escudero‐Sahuquillo, Pedro J. García,

Cloud Computing and Resource Management

The interconnection network plays an important role in the technological revolution brought by Exascale and Big-Data challenges to high-performance computing (HPC) systems and Datacenters. In these systems, the number of processing and storage nodes is growing significantly in order to meet the increasingly higher computing-power and storage demands. On the other hand, the overall power consumption of these systems must remain approximately as it is nowadays; otherwise, the cost of these systems in terms of acquisition and power consumption would be excessive. Therefore, the interconnection network must provide low latency and high-communication bandwidth, while requiring low power, otherwise becoming the bottleneck of the entire HPC system. In order to face these challenges and improve the network performance, several design aspects should be considered: network topology and connectivity, routing algorithm, reliability and fault tolerance, virtualization, congestion control, network configuration and control, development of the software stack, etc. This Special Issue of the Journal on Concurrency and Computation: Practice and Experience gathers several research works related to the latest advances and efforts in the design of high-performance interconnection networks, like those intended to be part of the near-future Exascale and Big-Data systems. In response to the Call-For-Papers of this Special Issue, we received very interesting submissions. Specifically, seven papers were submitted, which have been assessed by 21 reviewers, so that each paper has received three reviews. As can be seen in the list included in this editorial paper, all the reviewers are experts of the highest level, from both industry and academia, and their collaboration has been essential for the success of this Special Issue. We would like to thank the reviewers, which have provided not only detailed evaluations of the submissions but also valuable suggestions to enhance them. Based on the review and assessment process performed by the reviewers, we have been able to select five papers, which reflect prominent efforts and advances in the design and development of scalable high-performance interconnection networks for HPC systems and Datacenters. In that sense, Zahn et al1 analyze different aspects of energy proportionality in interconnection networks for systems designed within current technical constraints, but also for future systems that might be designed with different parameters. Benito et al2 explore a range of routing solutions based on exploiting explicit congestion notification messages (in particular, 802.1Qau) to adapt the number of packets using non-minimal paths. Andujar et al3 present how to build a 5DT torus network using a specific commercial 6-port network card (EXTOLL) to interconnect the system nodes. Tasoulas et al4 suggest solutions to rectify the space-domain scalability issues that are present in vSwitch-enabled subnets as a result of the VMs using dedicated layer-two addresses, also discussing routing strategies for virtualized environments using vSwitches and presenting a routing algorithm for Fat-Trees. Finally, Yébenes et al5 propose a combined mechanism to provide Slim Fly network with both non-minimal routing and queuing schemes by using several virtual networks to guarantee deadlock freedom. In our opinion, both the scope and the high technical quality of these papers make them very relevant for anyone involved, or just interested, in the Exascale and Big-data challenges, especially from the point-of-view of high-performance interconnection networks. List of reviewers We would like to thank the following reviewers for their support assessing the submitted papers to this Special Issue. Their reviews and discussions provided invaluable help for the guest-editors final decision. Dhabaleswar K. Panda, The Ohio State University, USA Enrique Vallejo, University of Cantabria, Spain Ernst Gunnar Gran, NTNU, Norway Evangelos Tasoulas, Schibsted Media Group, Norway Francisco J. Alfaro, University of Castilla-La Mancha, Spain Francisco J. Andújar, Technical University of Valencia, Spain Gaspar Mora, Intel Corporation, USA John Kim, KAIST, South Korea Jose Cano-Reyes, University of Glasgow, United Kingdom Jose Miguel Montañana, University of York, United Kingdom Julio Ortega, University of Granada, Spain Maria Engracia Gomez, Technical University of Valencia, Spain Matthieu Perotin, ATOS BULL, France Michihiro Koibuchi, National Institute of Informatics, Japan Nikos Chrysos, FORTH, Greece Pedro Lopez, Technical University of Valencia, Spain Peng Zhang, Stony Brook University, USA Ryan E. Grant, Sandia National Laboratories, USA Samuel Rodrigo, Graphcore, Norway Sebastien Rumley, Columbia University, USA Yuho Jin, New Mexico State University, USA