Produção Nacional
Revisado por pares
Modelling and control of DC–DC Ćuk converter with and voltage multiplier cells for PV applications
2019; Institution of Engineering and Technology; Volume: 12; Issue: 9 Linguagem: Inglês
10.1049/iet-pel.2019.0073
ISSN1755-4543
AutoresTiago Miguel Klein Faistel, Carlos Henrique Illa Font, António Manuel Santos Spencer Andrade, Mário Lúcio da Silva Martins,
Tópico(s)Multilevel Inverters and Converters
ResumoIET Power ElectronicsVolume 12, Issue 9 p. 2214-2223 Research ArticleFree Access Modelling and control of DC–DC Ćuk converter with and voltage multiplier cells for PV applications Tiago Miguel Klein Faistel, Corresponding Author Tiago Miguel Klein Faistel tiagofaistel@yahoo.com.br orcid.org/0000-0001-7891-6594 Department of Electronics and Computation, Federal University of Santa Maria, Santa Maria, BrazilSearch for more papers by this authorCarlos Henrique Illa Font, Carlos Henrique Illa Font orcid.org/0000-0002-8206-7617 Department of Electronics Engineering, Federal University of Technology of Parana, Ponta Grossa, BrazilSearch for more papers by this authorAntónio Manuel Santos Spencer Andrade, António Manuel Santos Spencer Andrade orcid.org/0000-0001-6098-0475 Federal University of Santa Maria, Campus Cachoeira do Sul, BrazilSearch for more papers by this authorMário Lúcio da Silva Martins, Mário Lúcio da Silva Martins Department of Electronics and Computation, Federal University of Santa Maria, Santa Maria, BrazilSearch for more papers by this author Tiago Miguel Klein Faistel, Corresponding Author Tiago Miguel Klein Faistel tiagofaistel@yahoo.com.br orcid.org/0000-0001-7891-6594 Department of Electronics and Computation, Federal University of Santa Maria, Santa Maria, BrazilSearch for more papers by this authorCarlos Henrique Illa Font, Carlos Henrique Illa Font orcid.org/0000-0002-8206-7617 Department of Electronics Engineering, Federal University of Technology of Parana, Ponta Grossa, BrazilSearch for more papers by this authorAntónio Manuel Santos Spencer Andrade, António Manuel Santos Spencer Andrade orcid.org/0000-0001-6098-0475 Federal University of Santa Maria, Campus Cachoeira do Sul, BrazilSearch for more papers by this authorMário Lúcio da Silva Martins, Mário Lúcio da Silva Martins Department of Electronics and Computation, Federal University of Santa Maria, Santa Maria, BrazilSearch for more papers by this author First published: 18 July 2019 https://doi.org/10.1049/iet-pel.2019.0073Citations: 7AboutSectionsPDF ToolsRequest permissionExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onFacebookTwitterLinkedInRedditWechat Abstract This study proposes the modelling and control of a Ćuk converter with reduced redundant power processing and voltage multiplier for photovoltaic (PV) applications. The converter makes use of a perturb & observe algorithm to extract the maximum power of a single PV panel. The proposed converter is derived from the association of the and voltage multiplier cells in order to achieve the high step-up voltage gain. This association allows a high-voltage gain, low-voltage and current stresses on the semiconductors. Experimental results are presented to validate the proposal a prototype with the input of 37.4 V, output voltage of 400 V and rated input power of 200 W. 1 Introduction In recent years, renewable energy systems such as photovoltaic (PV), fuel cells etc. are developing rapidly. Among these renewable energy sources, solar energy has become the most popular all over the world. The efficiency of solar cells depends on many factors such as temperature, insolation, dirt, shadow etc. Fast climatic changes such as cloudy weather and an increase in ambient temperature can reduce the PV array output power. To improve the poor efficiency of PV systems, some methods are proposed, among which is a concept called maximum power point tracking (MPPT). The MPPT algorithms follow the same goal which is maximising the PV module output power by tracking the maximum power on every operating condition [1]. On the other hand, the voltage level provided by a single PV panel is lower than 50 V [2]. The first stage consists of a high-voltage step-up conversion ratio DC–DC converter that regulates the voltage from the PV module, adjusting the bus voltage so that it is possible to connect to an inverter and supply power to the grid [3, 4]. Thus, interest in DC–DC converters for high-voltage conversion ratio applied has increased in recent years [5]. On the other hand, many countries have been adopting standards that requires system grounding for a grid-tied PV system, which demands galvanic isolation in grid-tied PV systems [6, 7]. To increase the voltage gain in converters with galvanic isolation, it can be done by increasing the duty cycle or by increasing the transformer turns ratio . High values of N often result in an increase of parasitic leakage inductances. It must be taken into account that large leakage inductances lead to additional undesired stored energy, which results in voltage spikes across the semiconductors and reduction of system efficiency [8]. Another possibility is to increase the duty cycle. However, because of the effects caused by parasitic elements, the practical values of have a practical upper limit (usually ) [9]. Therefore, to overcome these limitations, many techniques to achieve high-voltage step-up at low values of duty cycle and turns ratio have been proposed in the literature. In this sense, different techniques to raise the voltage of the converters are being explored such as coupled inductor [10], voltage multiplier [8], switched inductor [11], switched capacitor [12], cascade and stacked converters [13]. However, when using these techniques, the complexity and the cost of the converter may increase considerably. A simpler and well-established alternative was proposed in [14], where the converter consists of the cascade connection of a buck–boost converter with a boost converter. Since the two active switches are synchronised, they can be reduced as a single one. However, the single-switch boost converter cannot provide galvanic isolation. Thus, this technique can be applied to other isolated topologies such as the Ćuk converter. The voltage multiplier circuit has been used in the converter in different ways. The most common is to replace the output rectifier with one-by-one diode capacitor . High-voltage levels can be attained by increasing the number of multiplying cells [8]. The present work proposes a new converter, where its cell is associated at the input of the converter and voltage multiplier is secondary of the transformer secondary. This paper is organised as follows. In Section 2, it will be explained in detail the construction of the proposed converter. In Section 3, the analysis and modelling of the converter are described. Section 4 presents the voltage controller design. Finally, in Sections 5 and 6, experimental results and conclusion are presented, respectively. 2 Analysis of the proposed Ćuk converter This topology provides a low-input current ripple with the aid of inductor . It also yields a low-output current ripplewith the presence of an output filter formed by inductor and capacitor [15].Moreover, voltage gain of the converter is given by (1) In Fig. 1b,the points 'r, x, y,i, j and z' are highlighted.From these references, two voltage step-up cells can be associated. Thus, inFig. 2 two high step-up cells arepresented. Fig. 2a shows theR2P2 cell. When thevoltage is higher than zero , that is, (), the voltage across the inductor is and across the inductor is ; therefore, the diode are reverse biased, while the diode is forward biased. When the voltage is lowerthan zero , that is, , while supplies energy to . Diode is forward biased, while is reverse biased. When associating this cellin the isolated Ćuk converter, the cell gain (2) portion is multiplied to the gain of the converter (2) Fig. 1Open in figure viewerPowerPoint Isolated Ćuk converter (a) Isolated Ćukconverter, (b) Isolated Ćuk converter associated with and voltage multiplier structurecells Fig. 2Open in figure viewerPowerPoint High step-up techniques (a)cell, (b) Voltage multiplier cell Voltage multiplier cell consisting of capacitors , and diodes , as shown in Fig. 2b. When the voltage , the diode is forward biased and the diode is reverse biased. The capacitor loads from the sum of the voltages and , that is, . On the other hand, when the capacitor loads from the sum of the voltages , that is, . The gain (3) portion is multiplied to the gain of the converter (3)From the presented cells, three combinations are possible, and the static gain is described by (4) (5) (6)Fig. 3 shows the gain of the Ćuk converter with all combinations of cells. As can be seen, the converter that employs the two cells has the highest static gain. The proposed converter is obtained through association of the two high step-up cells, which can be seen in Fig. 4a. Fig. 3Open in figure viewerPowerPoint Static gain of Ćuk converter with an association of cells Fig. 4Open in figure viewerPowerPoint Step-up DC–DC Ćuk converter with and voltage multiplier cells (a) Isolatedcircuit, (b) Equivalent circuit withouttransformer 3 Analysis and modelling of the proposed converter The converter circuit used to derive the models is presented in Fig. 4a. As can be seen in Fig. 4b, the circuit is obtained after reflecting the components of the secondary side of the transformer to the primary side. In the relationship of the turns ratio of the transformer, output voltage, output resistance and output inductance are given by (7)The capacitances and are given by (8)Since the capacitors and are in series, the association can be obtained by (9) 3.1 Principle of operation The operating principles of the proposed converter are described in this section. The proposed converter has two operating modes for a switching period. Fig. 5 shows the key waveforms of the proposed converter in one switching period in continuous conduction mode (CCM). To perform the steady-state analysis, the following assumptions are made: All power devices are ideal, the capacitor was considered to be equivalent series resistance . The transformer is modelled ideally, without a leakage inductor and an ideal transformer, with a turns ratio of . All the capacitors are large enough to consider their voltage constants during one switching period. The components that are in grey are OFF. Considering the small ripple approximation, and are constants. Fig. 5Open in figure viewerPowerPoint Main ideal waveforms of the proposed converter 3.1.1 Mode 1, Fig. 5, (–) The currents in the inductors , and are given by (10) (11) (12)The current in the switch is equal to (13)The currents in the diodes , , and are (14) (15) (16)The voltages on the diodes and are (17) (18)This interval lasts until the switch is turned of at instant t1. The ratio of t1 and Ts is defined as the converter duty-cycle (δ). 3.1.2 Mode 2, Fig. 5, (–) The currents in the inductors , and are given by (19) (20) (21)The current in the switch is zero (22)The currents in the diodes , , and are defined by (23) (24) (25)The voltage across the switch S is (26)The voltages across the diodes and are defined by (27) (28)This interval lasts until the end of the switching period, Ts. 3.1.3 Maximum and minimum current values through inductors The maximum and minimum current values of the inductors are defined by the following equations, where and are the instants of time when the minimum and maximum values occur, respectively (29) (30) (31) (32) 3.1.4 Input current ripple The ripple of the input current for the proposed converter , isolated Ćuk converter and their difference is calculated by (33) and (34), for the same inductance value. As can be seen in Fig. 6, the difference depends on the value of the converter static voltage gain ; however, for it becomes almost constant around 2 A, which corresponds to an increase of 30.68% with respect to the input current of the isolated Ćuk converter (33) (34) Fig. 6Open in figure viewerPowerPoint Comparison of input ripple: the proposed converter (red line), Ćuk converter (blue line) and difference (black line) 3.2 State-space equations The dynamic behaviour of power electronic circuits can be analysed using the averaged model concept, where modelling of high-frequency DC–DC converters can be done [14]. To control the input voltage and make the tracking of the MPP converter is necessary to obtain the transfer functions that relate the input voltage to the panel current and the duty cycle . The converter has two stages of operations in CCM and they are presented in Fig. 7. The description of the stages of operation is as follows: Fig. 7Open in figure viewerPowerPoint Operation stages of the proposed converter in CCM (a) Equivalent circuit during mode1, (b) Equivalent circuit during mode2 • Mode 1 (, Fig. 7a): This mode begins when the switch S is turned ON, the equivalent circuit of this step can be seen in Fig. 7a. The inductors (, and ) are magnetising and their voltages are given by (35)–(37), respectively (35) (36) (37)In this mode, the capacitors , and are charging, and the capacitors and are discharging. The currents in the capacitors , , , and are defined, respectively, by (38) (39) (40) (41) (42)The independent states of the converter are the current in the inductors and the voltage of the capacitors. Therefore, the state vector is defined as (43)The input current is an independent source. So, the input vector is defined as . To model the converter input voltage , it must be placed in the output vector. Thus, the output vector is defined as: , (35)–(42) can be rewritten as in (44)where (45) (46) (47) (48) (49)• Mode 2: (, Fig. 7b): This mode begins when the switch S is turned OFF. The inductor (, and ) are demagnetising, and their voltages are given by (50)–(52), respectively (50) (51) (52)In this mode, the capacitors and are charging and the capacitors , and are discharging. The currents in the capacitors , , , and are defined, respectively, by (53) (54) (55) (56) (57)Equations (52)–(57) can be rewritten as (58) (59)where (60)and , and . 3.3 State-space equilibrium equations Assuming that the natural frequencies of the converter, and the frequencies of the variations of the inputs of the converter, are slower than the switching frequency, the state vector of equilibrium is expressed as (61)and the equilibrium output vector as , they are defined by (62), where the input vector is defined as , therefore (62)where 3.4 Small-signal AC model The equations of state of the linear AC model are defined by (63), where , where are small AC variations in the input vector and duty cycle and are the resulting small AC variations in the state and output vectors. To obtain the linear model, it must be assumed that the disturbing signals are much smaller than their steady-state values, so (63)where The converter transfer functions can be found by applying Laplace transform in (63), which results in (64)can be rewritten as in (65) 3.5 Voltage gain derivation The steady-state current and voltage values for the chosen operating point are defined in (61). To find the static voltage gain of the converter, it is assumed that the converter operates in a steady state. It can be stated that the total voltage-seconds applied across each inductor (, and ) during a switching period is zero. Therefore (66)where Solving (66) for , we obtain the static gain (67)A single PV module CS5A-200 manufactured by Canadian Solar and described in standard test conditions (1000 W/m2 and cell temperature of ) was emulated at the Agilent E4360A programmable power supply are , , , and . From the module data, the voltage gain that converter must provide is calculated by (68)Fig. 8a shows the results for the static voltage gain for the proposed converter with different values of N. Considering and , the duty cycle can be calculated by (69) Fig. 8Open in figure viewerPowerPoint Static voltage gain (a) Static voltage gain versus dutycycle, (b) Transformer turns ratio versusduty cycle Therefore, in Fig. 8b, the relation between N and can be seen, where the operating point is highlighted. 3.6 Voltage stress in semiconductors The voltage stress on the switch is given by (70)For the diode and , the voltage stresses are given by the following expressions: (71)The voltage stress on the diode (72)For diode , the voltage stress is given by (73) 3.7 Inductors and capacitors design methodology In the design of inductors, the peak-to-peak variation in the inductor current is often used as adesign criterion. The inductance values of , and are calculated by the equation below: (74) where is a designed pre-defined value, seeTable 1. For inductor , , and . For inductor , , and . For inductor , , and . Table 1. Prototype parameters and components Symbol Parameter Value input power 200 W input (output) 37.4 V (400 V) switching frequency 50 kHz S switch IRFP4668 (200 V, 130 A) N Trafo turns ratio 22:88 () inductors 440, 220, 104 μH capacitors 18, 27, 82 μF capacitors 18, 0.68, 2.2 μF diodes MBR20200CT (200 V) diodes C4D20120A (1200 V) current ripple 10, 35, 10% voltage ripple 2.5% voltage ripple 1, 4, 1, 0.1% The capacitance values of , , , , , and are given by (75)where is a designed pre-defined value, see Table 1. For capacitor , , , and . For capacitor , , , and . For capacitor , , , and . For capacitor , , , and . For capacitor , , , and . For capacitor , , , and . 3.8 Comparison of topologies In Table 2, the following characteristics are evaluated:voltage gain and stress on the switch and output diodes of each converters. Ascan be seen in Fig. 9, a higher static gaincan be achieved and the voltage stress on semiconductors of the proposedconverter is smaller than those found in other converter as described inTable 3. However, this high-voltagegain is achieved with the addition of components, and consequently with a costincrement. Table 2. Converters performance comparison [14] [16] Ćuk Proposed voltage stress(S) voltage stress () number of diodes 3 2 1 4 number of L(C) 2 (2) 2 (3) 2 (3) 3 (5) Table 3. Voltage stress converters performance comparison [14] [16] Ćuk Proposed 0.694 0.906 0.727 0.388 voltage stress(S) 10.695 10.695 3.673 2.673 voltage stress () 10.695 10.695 14.695 10.695 Fig. 9Open in figure viewerPowerPoint Comparison of the static gain of the selectedtopologies 3.9 Simulation results To validate the obtained models, the proposed converter operating in CCM is simulated with the parameters summarised in Table 1. Its waveforms are compared with the results obtained from simulation and dynamic models. The transfer functions of (input voltage to duty cycle) and (input voltage to input current) are given by (76)where , , , , , , , , , , , , , , , , , , , , , , and . This way, the perturbation in the input voltage under a perturbation of 5% in the input current is shown in Fig. 10a and under a perturbation of 0.5% in the duty cycle is shown in Fig. 10b. As can be seen, the dynamic and static models track accurately the converter waveforms, validating the models. Fig. 10Open in figure viewerPowerPoint Input voltage in CCM operation under a perturbation (a) 5% in current , (b) 0.5% in duty cycle 4 Controller design The controller design is performed in the Z domain based on phase margin andzero gain crossover frequency. The voltage control of the proposed converter iscarried out through a proportional–integral (PI) controller which guarantees zerosteady-state error for step-type input references. Equation (77) summarises the PI controllerdesigned (77) Fig. 11ashows the Bode diagrams for the open-loop uncompensated (blue line) and compensated(red line) transfer functions of the proposed converter. Fig. 11Open in figure viewerPowerPoint Frequency response of the plant (a) Proposed converter, (b) Isolated Ćuk converter It can be seen that a zero gain crossover frequency of 16.3 Hz and a phase margin of guarantee a good performance in terms oftransient speed, stability and steady state. In the same way, Fig. 11b shows the Bode diagrams ofthe isolated Ćuk converter. It can be seen that a zero gain crossover frequency of5.54 Hz and a phase margin of is obtained. Compared to the proposedconverter, the Ćuk converter has a lower DC bandwidth and gain, besides having aphase inversion of ∼1500 Hz. In spite of being a plant of eighth order, thecompensated closed-loop system allows a large bandwidth than that of the Ćukconverter. It will result in a fast response during transients. The converter is connected to a PV emulator input and its output connected to the DC link, as shown in Fig. 12. The perturb & observe (P&O) algorithm is chosen for MPPT. The output voltage of the PV panels denoted as is compared with a reference voltage which is calculated from the MPPT algorithm. Thus, the loop controls the PV power and forces voltage to follow the reference voltage , then the PV panels will operate at maximum power. Fig. 12Open in figure viewerPowerPoint Control system 5 Experimental results A 200 W laboratory prototype was assembled and tested with the specifications given inTable 1. The gate–source pulse isproduced by digital signal processor TMS320F28335 Texas Instruments . The measurement equipment included theoscilloscope Tektronix DPO3034 and the power analyser Yokogawa WT1800. Fig. 13a shows the output voltage (uppertrace), input voltage (middle trace) and switch voltage (lower trace). Fig. 13b shows the capacitor voltage (upper trace), capacitor voltage (middle-upper trace), capacitor voltage (middle-lower trace) and capacitor voltage (lower trace). Fig. 13c shows the voltage stress insemiconductors: diode voltage (upper trace), diode voltage (middle-upper trace), diode voltage (middle-lower trace), diode voltage (lower trace). Fig. 13d shows the pulse-widthmodulation (PWM) control signal at metal–oxide–semiconductor field-effect transistor(MOSFET) gate–source terminals (upper trace), current (middle-upper trace), current (middle-lower trace) and current (lower trace). Fig. 13e shows the PWM control signal at MOSFETgate–source terminals (upper trace), current waveforms of the primary of thetransformer (middle trace) and current of the secondary ofthe transformer (lower trace). Fig. 13Open in figure viewerPowerPoint Experimental waveforms of current (a) Input, output and voltage (time scale: 8 μs/div), (b) Capacitors voltage (time scale:8 μs/div), (c) Voltage in semiconductors (time scale:8 μs/div), (d) Inductors current (time scale:8 μs/div), (e) Current on primary and secondarytransformers (time scale: 8 μs/div) Fig. 14a presents the experimental results of the input voltage for an irradiation step from 1000 to 800 W/m2. The input voltage has good performance for the irradiation variation. Fig. 14b exposes a step of the irradiance from 50 to 1000 W/m2, where it accomplished the MPPT. Fig. 14Open in figure viewerPowerPoint Experimental waveforms for a step of irradiance (a) 1000–800 W/m2 (time scale: 40 ms/div), (b) 50–1000 W/m2 (time scale:10 s/div) Fig. 15 shows a comparison between the proposed Ćuk converter and the isolated Ćuk converter prototype. The proposed converter has a higher efficiency than the Ćuk converter across all ranges of the irradiation, with the maximum value of 93.83% with the irradiation equal to 600 W/m2. From the results, it can be observed that the proposed converter improved the efficiency in relation to the isolated Ćuk converter, aiming to use the converter in PV systems. The standard European (Euro) efficiency and California Energy Commission efficiency were calculated according to Vasconcelos et al. [17], and their values are and . Fig. 16 shows the photograph of the experimental system for the proposed converter. Fig. 15Open in figure viewerPowerPoint Experimental conversion efficiency Fig. 16Open in figure viewerPowerPoint Photograph of the experimental system 6 Conclusion This paper has presented a Ćuk converter with and voltage multiplier cells. A model of the converter is obtained based on the input average voltage produced. This model is then used to design a PI voltage controller. The proposed converter was fully tested for performance parameters including the efficiency and MPPT performance. The proposed converter is operated at an input voltage of 37.4 V, output voltage of 400 V and output power of 200 W. In the nominal power, the efficiency is 93.75%. The proposed converter ensures good transient response when the converter is subject to irradiance step. The experimental results indicate that the proposed method ensures the input voltage control, which permits the employment of a P&O MPPT algorithm. Experimental results are presented and confirm the theoretical analysis. 7 Acknowledgments This study was financed in part by the Coordination for the Improvement of Higher Education Personnel – Brazil (CAPES/PROEX) – Finance Code 001 and the National Institutes of Science and Technology in Distributed Generation (INCT-GD) – under processes CNPq: 465640/2014-1, 423405/2018-7 (Universal), 308776/2018-6 (PQ); CAPES 23038.000776/2017-54 and FAPERGS 17/2551-0000517-1. The authors express their gratitude for the funding agencies. 8 References 1Safari A., and Mekhilef S.: 'Simulation and hardware implementation of incremental conductance MPPT with direct control method using Cuk converter', IEEE Trans. Ind. Electron., 2011, 58, (4), pp. 1154– 1161 2Li Q., and Wolfs P.: 'A review of the single phase photovoltaic module integrated converter topologies with three different DC link configurations', IEEE Trans. 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