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Reliability Calculation With Respect to Functional Failures Induced by Radiation in TMR Arm Cortex-M0 Soft-Core Embedded Into SRAM-Based FPGA

2019; Institute of Electrical and Electronics Engineers; Volume: 66; Issue: 7 Linguagem: Inglês

10.1109/tns.2019.2921796

1558-1578

Luis Alberto Contreras Benites, Fábio Benevenuti, Ádria Barros de Oliveira, Fernanda Lima Kastensmidt, N. Added, Vitor A. P. Aguiar, N. H. Medina, M. Guazzelli,

Physical Unclonable Functions (PUFs) and Hardware Security

This paper presents comparative results from fault injection (FI) and heavy ions accelerated irradiation on a Xilinx 7 series static RAM (SRAM)-based field-programmable gate array (FPGA) for a soft-core microprocessor mitigated by triple modular redundancy (TMR) with different levels of granularity. The Arm Cortex-M0 soft-core processor executing two software applications is employed as a case study. The TMR implementation is automatically generated from synthesized netlist and includes coarse and fine grain variants. Apart from the TMR mitigation, the configuration memory scrubbing is used as implemented by the engine natively available on Xilinx 7 series FPGAs. Experiments with FI and heavy ions allow analyzing the effectiveness of the automated TMR mitigation combined with memory scrubbing and also to analyze the consistency of reliability metrics from FI and heavy ions. The dynamic cross section of the design was improved up to 4.5 times according to the implemented TMR granularity and when associated with the configuration memory scrubbing.