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VLSI implementation of anti‐notch lattice structure for identification of exon regions in Eukaryotic genes

2020; Institution of Engineering and Technology; Volume: 14; Issue: 5 Linguagem: Inglês

10.1049/iet-cdt.2019.0086

1751-861X

Vikas Pathak, Satyasai Jagannath Nanda, Amit M. Joshi, Sitanshu Sekhar Sahu,

Genomics and Phylogenetic Studies

IET Computers & Digital TechniquesVolume 14, Issue 5 p. 217-229 Research ArticleFree Access VLSI implementation of anti-notch lattice structure for identification of exon regions in Eukaryotic genes Vikas Pathak, Corresponding Author Vikas Pathak 2013rec9567@mnit.ac.in Department of Electronics and Communication Engineering, Swami Keshvanand Institute of Technology, Jaipur, 302017 India Department of Electronics and Communication Engineering, Malaviya National Institute of Technology, Jaipur, 302017 IndiaSearch for more papers by this authorSatyasai Jagannath Nanda, Satyasai Jagannath Nanda orcid.org/0000-0002-4005-5589 Department of Electronics and Communication Engineering, Malaviya National Institute of Technology, Jaipur, 302017 IndiaSearch for more papers by this authorAmit Mahesh Joshi, Amit Mahesh Joshi orcid.org/0000-0001-7919-1652 Department of Electronics and Communication Engineering, Malaviya National Institute of Technology, Jaipur, 302017 IndiaSearch for more papers by this authorSitanshu Sekhar Sahu, Sitanshu Sekhar Sahu Department of Electronics and Communication Engineering, Birla Institute of Technology, Mesra, 835215 IndiaSearch for more papers by this author Vikas Pathak, Corresponding Author Vikas Pathak 2013rec9567@mnit.ac.in Department of Electronics and Communication Engineering, Swami Keshvanand Institute of Technology, Jaipur, 302017 India Department of Electronics and Communication Engineering, Malaviya National Institute of Technology, Jaipur, 302017 IndiaSearch for more papers by this authorSatyasai Jagannath Nanda, Satyasai Jagannath Nanda orcid.org/0000-0002-4005-5589 Department of Electronics and Communication Engineering, Malaviya National Institute of Technology, Jaipur, 302017 IndiaSearch for more papers by this authorAmit Mahesh Joshi, Amit Mahesh Joshi orcid.org/0000-0001-7919-1652 Department of Electronics and Communication Engineering, Malaviya National Institute of Technology, Jaipur, 302017 IndiaSearch for more papers by this authorSitanshu Sekhar Sahu, Sitanshu Sekhar Sahu Department of Electronics and Communication Engineering, Birla Institute of Technology, Mesra, 835215 IndiaSearch for more papers by this author First published: 21 May 2020 https://doi.org/10.1049/iet-cdt.2019.0086Citations: 5AboutSectionsPDF ToolsRequest permissionExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onFacebookTwitterLinkedInRedditWechat Abstract In a Eukaryotic gene, identification of exon regions is crucial for protein formation. The periodic-3 property of exon regions has been used for its identification. An anti-notch infinite impulse response (IIR) filter is mostly employed to recognise this periodic-3 property. The lattice structure realisation of anti-notch IIR filter requires less hardware over direct from-II structures. In this study, a hardware implementation of IIR anti-notch filter lattice structure is carried out on Zynq-series (Zybo board) field programmable gate array (FPGA). The performance of hardware design has been improved using techniques like retiming, pipelining and unfolding and finally assessed on various Eukaryotic genes. The hardware implementation reduces the time frame to analyse the DNA sequence of Eukaryotic genes for protein formation, which plays a significant role in detecting individual diseases from genetic reports. Here, the performance evaluation is carried out in MATLAB simulation environment and the results are found similar. Application-specific integrated circuit (ASIC) implementation of the anti-notch filter lattice structure is also carried out on CADENCE-RTL compiler. It is observed that the FPGA implementation is 31 to 34 times faster and ASIC implementation is 58 to 64 times faster compared to the results generated by MATLAB platform with similar prediction accuracy. 1 Introduction DNA molecules store digital information that constitutes the genetic blueprint of any living organism [[1]]. A single DNA sequence is a biomolecule, which consists of four linked smaller components (Adenine (A), Thynine (T), Cytosine (C) and Guanine (G)) termed as nucleotides. The DNA sequence is divided into two parts: Genes (which are the functional regions and responsible for protein formation from DNA sequence) and Intergenic spaces (regulatory regions). Proteins are responsible for the functionality of any living organism, which is also a biomolecule consisting of 20 – linked, smaller components called amino acids. The amino acids are made up of triplets (called as codons) of 4-possible DNA nucleotides (A, T, C & G), whose total combinations = = 64 possible codons of DNA. Any protein has a particular genetic code, which maps each of the 64-possible codons of DNA character into one of the 20-possible amino acids [[2]]. Genes are of two types: Eukaryote (cells that have nucleolus) and Prokaryote (have no nucleus). The Eukaryote genes consist of two regions: Exons (protein coding regions responsible for protein formation from a gene of any DNA sequence) and Introns (non-coding regions). The Prokaryote genes do not have any such classification (they possess only exons-regions). In every Eukaryote gene, the Introns need to be identified and eliminated before actual protein coding (or beginning of the synthesis process). Thus there is a need to identify the exons and intron regions accurately for production of proteins from DNA sequence. The processing and analysis of DNA sequence data is helpful for discovering families of genes or gene products that can be used to classify disease, thereby leading to molecular-based diagnosis and prognosis [[3]]. The Exon regions reflect a period-3 property due to the existence of codon structure in protein synthesis process [[4]]. Several Digital signal Processing (DSP) methods have been reported by researchers to explore this period-3 property, such as: sliding DFT (STDFT) [[5]-[10]], digital filtering [[11]-[15]], continuous wavelet transform [[16]-[18]], discrete wavelet transform [[19], [20]] and S-transform [[21]]. In this paper, the focus is given on digital filtering method. Vaidyanathan and Yoon [[11]] used second-order digital filters like anti-notch and multi-stage filters for protein-coding region identification. Ramachandran et al. [[12]] implemented the narrow band-pass digital filter and low pass filter for exon region detection and reported lower computational time compared to STDFT [[10]] based approach. An improved comb filter-based approach is reported in [[13]] for detection of Exon region with better prediction accuracy and less computational complexity. For the same problem, Hota and Srivastava [[14]] had used three anti-notch IIR filters: conjugate suppression anti-notch filter (suppresses the conjugate frequency component), anti-notch filter followed by moving average filter (decrease the background noise) and harmonic suppression anti-notch filter (removes the harmonic frequency component). This model improved the prediction accuracy of proteins Exon coding regions identification. Recently, the modified conjugate suppression anti-notch IIR filter and linear predictive coding model are combined by Farsani et al. [[15]] to propose an efficient algorithm for improving the performance of conventional Goertzel algorithm in determining the protein-coding regions. Lattice filter structures are generally used to implement the finite and infinite impulse response (FIR and IIR) filters. They have several advantages over direct form structures, such as [[22]]: lesser sensitivity to coefficients quantisation and roundoff errors; architecture is modular in nature (i.e. an extra stage can be easily added if the order of the filter is increased [[23]]); in the hardware implementation, there is a requirement of the lower number of multipliers. The lattice structures are also effective as predictors/identifiers (as the structure simultaneously generates the forward and backward prediction errors). Vaidyanathan and Yoon [[11]] have also shown the cascaded lattice structures [[24], [25]] of IIR anti-notch digital filters. Designing of lattice structures (with minimum multipliers) of notch filter from all-pass digital filters is explained by Regalia et al. [[26]]. In the literature, this Exon region identification problem has been simulated with MATLAB software by many authors, but sufficient work has not been done in its hardware implementation. The hardware design is necessary to identify the gene characteristics of every individual human being. Hardware is also required to effectively detect individual disease from clinical/genetic reports. Hardware implementation is also important for reducing the time frame of individual centric and genetic drugs designing for hereditary diseases [[27]]. There is a need for digital hardware for this problem to annotate the gene in less time. Furthermore, DNA data is very large (test cases consist of sequence length ∼5000 to 8000 data samples), so fast processing and analysis of this data is required, which can be possible by re-configurable hardware architectures like field programmable gate array (FPGA) devices. Hardware implementation of lattice filter structures has been reported for a number of applications. Merged arithmetic has been used for high-speed hardware implementation of IIR lattice filters in [[28]]. A multiplier-less novel structure for lattice IIR filter is proposed in [[29]], which is applied for stochastic computing. Very Large Scale Integration (VLSI) implementation of lattice wave digital filters is carried out by Aggarwal et al. [[30], [31]] for the application of increasing sampling rate and Hilbert transform. Recently Bharade et al. [[32], [33]] have designed and implemented the lattice structure of IIR and FIR filters using floating-point arithmetic system on FPGA and compared its computational time complexity with MATLAB simulation. Hardware implementation of the lattice IIR filters for the identification of exon regions in genes has not been explored by any author. So this problem is focused in this paper. Major contributions of this paper are as follows: In this paper, the VLSI architectures of lattice IIR anti-notch filter are proposed to identify the protein-coding regions in Eukaryote genes. Unfolding DSP technique has been applied on retimed and pipelined lattice IIR structure for improving the performance (minimum critical path delay and hence achieve maximum clock frequency) to speed-up the exon region detection process for protein formation from gene DNA sequence. It is observed that FPGA and application-specific integrated circuit (ASIC) implementation of proposed design improves the computational time (by 31 to 34 times for FPGA and 58 to 64 times for ASIC) as compared to its MATLAB counterpart with the same prediction accuracy. Reduction in computational time for exon region identification will result in fast formation of proteins from DNA sequence. This will help reduce the time frame for designing individual centric drugs from clinical/genetic reports (DNA sequence) for finding any hereditary disease. Various evaluation parameters like sensitivity, specificity, accuracy, approximate correlation, ROC (receiver operating characteristics) and area under ROC curve (AUC) are also measured using MATLAB for finding the prediction accuracy of hardware as well as MATLAB implementation of anti-notch IIR lattice filter for exon region identification problem. Based on these parameters, it is proved that the proposed optimised hardware architecture of lattice IIR anti-notch filter shows a similar behaviour as of MATLAB approach. The rest of the paper is organised as follows. Section 2 defines the problem of Exon regions' identification. Section 3 details the proposed implementation of various IIR anti-notch lattice filter architectures. The simulation and synthesis results are discussed and analysed in Section 4. Finally, Section 5 concludes the paper. 2 Problem of Exon regions' identification 2.1 Numerical conversion of DNA sequence To apply any DSP technique for analysing the DNA sequence for protein-coding region identification, character values of DNA sequence have to be properly mapped to numerical values. In the literature there exist many techniques like binary indicator sequences (BIS), complex indicator sequences, real number mapping, tetrahedron mapping, Z-curve mapping, electron-ion interaction potential (EIIP) indicator sequence. In this paper, EIIP [[21]] method is used due to following advantages: (i) After the numerical mapping, it results in a single sequence compared to 4-sequences of BIS method. (ii) The resultant sequence has more biologically resemblance. In EIIP method, the DNA sequence is converted into numerical sequence by replacing each nucleotide to their respective EIIP values. The values for standard nucleotides are: A = 0.1260, T = 0.1335, C = 0.0806, G = 0.1340. Consider an example with sequence S[n] = TCGAGTAGAGACGT Then using the values mentioned above corresponding numerical sequence is obtained. S[n] = [0.1335 0.0806 0.1340 0.1260 0.1340 0.1335 0.1260 0.1340 0.1260 0.1340 0.1260 0.0806 0.1340 0.1335]. 2.2 IIR anti-notch filter for Exon region identification As the exon regions show a period-3 property, an anti-notch filter H(z) with frequency centred at and minimum stop-band attenuation of 13 dB is used for filtering DNA sequence. These characteristics of filter represent a period-3 property for Exon coding regions [[3]]. The EIIP input sequence is applied to the filter which results in the output sequence . In the output high energy peaks are obtained in the Exon-regions due to the period-3 property. The power spectrum of the filtered sequence is computed as follows: (1)A curve between filter output and its locations 'n', is used as an approximate indicator of Exonic-coding regions by showing a peak and no peaks in intron regions. 2.3 Lattice structure of IIR anti-notch filter An anti-notch filter is designed either by finite (FIR) or infinite (IIR) response filters. The requisites for design are low-filter order and high selectivity (i.e. narrow transition bands). Higher order filters have a longer transient response and mostly results in inefficient filtering for DNA sequence. Thus, in this paper a lower order IIR anti-notch filter is designed with operating frequency at . The transfer function of anti-notch filter is derived from notch filter using the relationship given as follows: (2)IIR notch filter is designed using all pass filters [[26]] (3)Substituting (3) in (2), IIR anti-notch filter is designed as (4)where A(z) is a second-order all-pass filters with two poles at and two zeroes at , R and are the pole radius and pole angle, respectively [[11]]. The A(z) is given by (5)When A(z) is placed in (3) and (4), solving them further a simplified form of the transfer function for notch filter and anti-notch filter are obtained in (6) and (7), respectively (6) (7) (8)here . The notch and anti-notch filter has zero at notch frequency of . The general form of second-order all-pass filters [[26]] is given by (9)Comparing (5) and (9), the value of and the value of is derived as (10) (11)Substituting (8) into (11) the value of . The self tuning of parameters (notch frequency) and (3 dB attenuation bandwidth) depends on coefficients and , respectively. The relationship between and is given by (12)where (which determines the quality) and (which determines the notch frequency) are directly dependent on and , respectively, without altering each other. Both cases are shown in Fig. 1. Fig. 1Open in figure viewer Dependency of bandwidth and notch frequency on multiplier coefficient(a) Quality control, (b) Frequency control In the design of anti-notch filter (with frequency ) for protein-coding region identification, the parameters are chosen as: and by assuming pole radius R = 0.99 for better quality control of . 3 Proposed method of IIR anti-notch lattice filter The anti-notch filter is implemented with all-pass filter in (4), shown in Fig. 2. The transfer function A(z) of IIR all-pass filter or of the anti-notch filter is implemented with either the direct form I (DF-I) or II-structures (shown in Figs. 3 and 4, respectively) using multiplier coefficients , , and , [[11]]. The cascaded butterfly lattice structure is used here (as shown in Figs. 5 and 6, respectively) with (9) and (7) considering multiplier coefficients and [[24]-[26]]. Fig. 2Open in figure viewer Block diagram of anti-notch filter for obtaining it from all-pass filter Fig. 3Open in figure viewer Direct form-I structure of IIR anti-notch filter Fig. 4Open in figure viewer Direct form-II structure of IIR anti-notch filter Fig. 5Open in figure viewer Butterfly lattice structure of all-pass filter A(z) Fig. 6Open in figure viewer Butterfly lattice structure of anti-notch filter Table 1 shows that the lattice structure requires fewer multipliers (3 numbers) and more adders (7 numbers) as compared to (5 numbers) and (4 numbers) of direct form structures. However, multipliers are more hardware consuming logic blocks as compare to adders. So lesser logic hardware is desirable for implementation of the lattice filter compared to direct form structure. Therefore lattice structures are preferred here for implementation. Table 1. Comparison of lattice and direct form structures of IIR anti-notch filter Parameter IIR structures DF-I DF-II Lattice multipliers 5 5 3 adders 4 4 7 registers (delay elements) 4 2 2 The data flow graph (DFG) of the lattice structure is shown in Fig. 7. The maximum operating clock frequency of this original lattice structure (ORLF), is defined by the critical path (dashed line). If and are the unit time-delay of adders and multipliers, respectively, then critical path delay of this filter is equal to 4-adders and 2-multipliers, i.e. . Hence the maximum operating clock frequency . Increasing the maximum clock frequency is one of the methods for enhancing the performance of any VLSI DSP filter. So the critical path delay is decreased to increase this maximum clock frequency. There are various DSP techniques to decrease this critical path delay like retiming, pipelining, parallel processing (Unfolding) [[34]] etc. Therefore, these techniques are applied one by one and their effect on the critical path delay and maximum clock frequency are analysed. Fig. 7Open in figure viewer Original DFG of lattice structure of anti-notch filter So to improve the performance of this original lattice filter (ORLF), as a first approach re-timing method (RTLF) is applied here, just by shifting the register dP1 from lower line to upper line. Fig. 8 shows the re-timed DFG of lattice filter. However, this retimed filter shows more critical path delay as of without retimed filter (ORLF). So this re-timing technique does not improve the performance, hence in the next step pipelining approach is applied. Fig. 8Open in figure viewer Retimed DFG of lattice filter In pipelining (PPLF), one extra delay element is added in between each stage of the lattice filter. This PPLF filter output has two clock pulse delay compared to original DFG. It is clear from Fig. 9 of pipelined DFG of lattice filter, that it has also same critical path delay . So pipelining alone also do not improve the performance. In next step retiming is applied to this pipelined DFG (RPLF), which is shown in Fig. 10. Fig. 9Open in figure viewer Pipelined DFG of lattice filter Fig. 10Open in figure viewer Retimed and pipelined DFG of lattice filter Here the cut-set retiming is applied by cutting the edges of delay elements after each stage. The critical path delay of the retimed and pipelined DFG (RPLF) of lattice filter is , which is one adder less delay as compared to ORLF-DFG. In order to improve the performance of this circuit further, unfolding technique is applied on original lattice filter (of Fig. 7) (UFORLF) and retimed-pipelined lattice structure (of Fig. 10) (UFRPLF), which is nothing but a n-level parallel processing of data. The block diagram of two-level parallel processing/unfolding is shown in Fig. 11, which shows the complete parallel processing/unfolded system including serial-to-parallel and parallel-to-serial converters. Here, if T is the clock period of multiple-input and multiple-output system, then serial-to-parallel and parallel-to-serial converters should work at T/2 clock period. This can be implemented in hardware using demultiplexers and multiplexers, respectively, with T/2 clock period as selection lines. Unfolding is done according to unfolding algorithm as in [[34]]. Fig. 11Open in figure viewer Block diagram of two level unfolded lattice filter Here, in this paper the two level unfolding (i.e. J = 2) is applied, in which the hardware is duplicated two times. In this case there is only single delay element in four paths (in edges to & to and to & to of original DFG and in edges to & to and to & to of retimed-pipelined lattice structure) and double delay elements in two paths (in edges to & to of retimed-pipelined lattice filter). So in unfolded DFG structure, the mapping of edges with these registers are changed according to the Unfolding Algorithm, without changing other edges mapping. The final two levels unfolded version DFG of original lattice filter structure (UFORLF), and retimed-pipelined structure (UFRPLF) is shown in Figs. 12 and 13, respectively. The critical path delays (T) (as shown in these diagrams) of these structure are and , respectively. In unfolding, the number of samples processed/unit time is twice as that of one sample without unfolded structure, i.e. the throughput of these unfolded structures is two. So the effective critical path delays of both these structures are equal to and , respectively. Hence the various architectures of anti-notch lattice filters, proposed in this paper are summarised as follows: ORLF – Original (without any optimization) Lattice Filter. Fig. 12Open in figure viewer Two level unfolding DFG of original lattice filter structure Fig. 13Open in figure viewer Two level unfolding DFG of pipelined and retimed lattice filter structure RTLF – Retimed Lattice Filter. RPLF – Retimed and pipelined Lattice Filter. UFORLF – Unfolding of original Lattice Filter. UFRPLF – Unfolding of Retimed and pipelined Lattice Filter. The critical path delay of lattice filter DFG for various techniques are compared in Table 2. This table indicates that the critical path delay of UFRPLF-structure is minimum as compared to other lattice structures. Hence the application of UFRPLF-structure have maximum clock frequency, which ultimately increase the processing speed of protein-coding region identification hardware system. Table 2. Theoretical critical path delay (T) of various ANF lattice filter architectures Method Critical path delay, T Throughput ORLF 1 RTLF 1 RPLF 1 UFORLF 2 UFRPLF 2 Due to the real values of coefficients ( and as shown in DFG and equations) of lattice filter and EIIP values of DNA data, the real data type is used in this paper for hardware implementation of IIR anti-notch filter lattice structure. There are two choices for representing real data type in binary form: fixed-point and floating point arithmetic. Here, in this paper for the application of protein-coding region identification, the amplitude range of power spectrum versus nucleotide location plot is from 0 to . Therefore, the floating point arithmetic (32-bit single precision IEEE-754 standard [[35]]) is used due to its superior accuracy, precision, resolution and range compared to fixed-point number representation. As shown in various DFGs of lattice structures, the main components of each structure are adders and multiplier. So, VLSI architecture of adders and multipliers are designed according to the single precision floating point arithmetic system. Hence, the 32-bit floating point data flows in the data path of all lattice filter structures of anti-notch IIR filter [[32], [36]]. Hardware implementation of IIR digital filter is explored by many authors, but unique contribution of this paper is its application for genomic signal processing. Therefore in this manuscript, hardware implementation of lattice structures of anti-notch IIR filter are explored for protein coding region identification in Eukaryotic genes. The speed of the hardware implementation of identification process is improved in comparison of its MATLAB implementation for the same accuracy. It has been observed around 31 to 34 times and 58 to 64 times for FPGA and ASIC implementation, respectively. This speed improvement is achieved after optimisation through unfolding and retiming to lattice architecture of IIR filter. 4 Results and discussion 4.1 Gene database The performance of the proposed lattice filter is assessed with five gene data sets as detailed in Table 3. All these data sets are collected from Gene Bank of National Center for Biotechnology Information (NCBI) [[37]]. Table 3. Various cases of gene data sets Case No. Gene name Sequence length No. of exon regions Location of exon regions 1 AF0099614 5195 2 1267-1639, 3888-4513 2 AJ223321 5321 1 1196-2764 3 AF019074 6350 3 3101-3187, 3761-4574, 5832-6007 4 AF009962 7422 1 3934-4581 5 F56F11 8060 5 928-1039, 2528-2857, 4114-4377, 5465-5644, 7255-7605 4.2 Simulation results The proposed methodology for the verification of the lattice filter is shown in Fig. 14 in terms of flow chart form. Any gene sequence is accessed from the NCBI database with the help of sequence viewer tool-box of MATLAB software through its accession number. Then character sequence of the gene is converted to a numerical sequence using the EIIP method. The obtained numerical sequence values (which are real values) are converted to 32-bit binary single precision floating point IEEE 754 format and saved in input text file. These binary input floating point values are read into the test bench to process them with the proposed lattice filter (to verify the design for various gene sequence). The lattice filter is simulated with test vectors of binary floating point values, and the resultant output response is saved in the output text file. Then the output sequence is read through MATLAB and converted into real values. Finally, the power spectrum of the filter output of any gene sequence is plotted concerning gene location in MATLAB. Fig. 14Open in figure viewer Methodology for verification of lattice anti-notch IIR filter structure The simulation of the proposed design is carried out using Modelsim 10.4a simulator. The simulation waveform (as shown in Fig. 15) of original DFG shows that the first filter output response of original lattice filter is achieved two clock pulses after the input is applied (i.e. the initial latency of the designed filter is two clock pulses). However, after that, the output response is achieved at every clock pulse for any input. Fig. 15Open in figure viewer Simulation waveform of lattice filter for Gene F56F11 data set In case of unfolded architecture (N-slow system, here N = 2) of a lattice filter, N−1 ( = 2−1 = 1) null operations (or 0 samples) must be interleaved after each useful signal sample to preserve the functionality of the algorithm [[34]]. Thus the input to lattice filter must be applied at alternate clock pulses (e.g. at odd clock pulses) and zero samples (0-value) should be applied at even clock pulses (the remaining clock pulses). In order to verify the performance of our proposed lattice structures five DNA inputs sequences are applied for simulations as follows: Gene F56F11 (Celegans), AJ223321.1 (HMR195 dataset), AF0099614, AF009962, AF019074.1. The simulation results of all DNA sequences for hardware anti-notch IIR filter is compared with that obtained from MATLAB platform. The output plots (power spectrum versus gene locations) of proposed lattice filter architectures (for F56F11 (Celegans), AF0099614, AJ223321.1 (HMR195 dataset) gene data sets) are shown in Figs. 16-18, respectively. All these figures represent the similar peaks of the power spectrum at its desired locations for respective data sets. These peaks show the protein-coding regions (exon regions) and also known as true positives. In spite of these peaks at desired locations, some unwanted peaks are also observed in these figures, known as false positives (non-coding regions), which have to be removed before generating proteins from various genes. Fig. 16Open in figure viewer Output plot of floating point anti-notch IIR lattice filter for Gene F56F11(a) Matlab result, (b) H/W DFG without optimisation, (c) H/W DFG With retiming, (d) H/W DFG with unfolding Fig. 17Open in figure viewer Output plot of floating point anti-notch IIR lattice filter for Gene AF0099614(a) Matlab result, (b) H/W DFG without optimisation, (c) H/W DFG with retiming, (d) H/W DFG with unfolding Fig. 18Open in figure viewer Output plot of floating point anti-notch IIR lattice filter for Gene AJ223321(a) Matlab result, (b) H/W DFG without optimisation, (c) H/W DFG with retiming, (d) H/W DFG with Unfoldin