Coupled inductors design of the bidirectional non‐inverting buck–boost converter for high‐voltage applications
2020; Institution of Engineering and Technology; Volume: 13; Issue: 14 Linguagem: Inglês
10.1049/iet-pel.2019.1479
ISSN1755-4543
AutoresCatalina González‐Castaño, Carlos Restrepo, Roberto Giral, Jordi García-Amorós, Enric Vidal‐Idiarte, Javier Calvente,
Tópico(s)Advancements in Battery Materials
ResumoIET Power ElectronicsVolume 13, Issue 14 p. 3188-3198 Research Article Free Access Coupled inductors design of the bidirectional non-inverting buck–boost converter for high-voltage applications Catalina González-Castaño, orcid.org/0000-0001-7205-9907 Departament d́Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, Tarragona, SpainSearch for more papers by this authorCarlos Restrepo, Department of Electromechanics and Energy Conversion, Universidad de Talca, Curicó, 3340000 ChileSearch for more papers by this authorRoberto Giral, Departament d́Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, Tarragona, SpainSearch for more papers by this authorJordi García-Amoros, Departament d́Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, Tarragona, SpainSearch for more papers by this authorEnric Vidal-Idiarte, Corresponding Author enric.vidal@urv.cat orcid.org/0000-0002-6016-4096 Departament d́Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, Tarragona, SpainSearch for more papers by this authorJavier Calvente, Departament d́Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, Tarragona, SpainSearch for more papers by this author Catalina González-Castaño, orcid.org/0000-0001-7205-9907 Departament d́Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, Tarragona, SpainSearch for more papers by this authorCarlos Restrepo, Department of Electromechanics and Energy Conversion, Universidad de Talca, Curicó, 3340000 ChileSearch for more papers by this authorRoberto Giral, Departament d́Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, Tarragona, SpainSearch for more papers by this authorJordi García-Amoros, Departament d́Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, Tarragona, SpainSearch for more papers by this authorEnric Vidal-Idiarte, Corresponding Author enric.vidal@urv.cat orcid.org/0000-0002-6016-4096 Departament d́Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, Tarragona, SpainSearch for more papers by this authorJavier Calvente, Departament d́Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, Tarragona, SpainSearch for more papers by this author First published: 01 November 2020 https://doi.org/10.1049/iet-pel.2019.1479Citations: 3 AboutSectionsPDF ToolsRequest permissionExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onEmailFacebookTwitterLinked InRedditWechat Abstract This work analyses the effects on the efficiency of the winding-to-winding capacitance of the coupled-inductor of the bidirectional non-inverting buck–boost converter in high-voltage applications. This converter presents many advantages that make it suitable for low-voltage hard-switching photovoltaic and fuel cell hybrid systems. However, experimental results obtained using the previously reported procedure to implement the coupled inductors show low-efficiency in high-voltage applications. A different implementation procedure of the coupled inductors, with lower winding-to-winding capacitance, is proposed. High-efficiency experimental results from a 400 V 1.6 kW prototype have been achieved over a wide operating voltage range, thanks to the use of SiC devices and the modified coupled inductors, confirming in this way its good potential as a building block also in high-voltage wide-gain-range applications. 1 Introduction Nowadays, bidirectional converters are used as discharging–charging battery regulators, renewable energy power processors, and electric vehicles (EVs) systems. In renewable systems like photovoltaic and wind power, the bidirectional dc–dc converter operates as an interface between the high voltage source and the low voltage battery in order to optimise the efficiency. Battery discharging–charging regulators are common in telecommunication applications and space platforms. In EVs powertrain configurations, global efficiency is optimised using high-efficiency bidirectional converters able to step-up and step-down voltages [1-3]. The non-inverting dc–dc buck–boost converter with coupled inductors [4] could be a good candidate to optimise global efficiency because it can step-up or step-down voltage with high efficiency, providing smooth transitions between both modes provided that a hysteretic pulse-width modulator (PWM) control strategy is used to activate its switches [5, 6]. This converter has the same wide conversion ratio than a single inductor non-inverting buck–boost converter with better efficiency because of reduced switches stress. In addition, the placement of their coupled inductors eliminates the pulsating nature of input and output currents and reduces the associated noise levels. Moreover, the combination of coupled inductors with an RC damping network in parallel with the intermediate capacitor eliminates the right-half plane (RHP) zero usually exhibited by conventional continuous conduction dc–dc converters in step-up voltage mode [4]. The solution to the problem of the RHP zeros using coupled inductors with an RC damping network has been reported in [7, 8]. This solution allows for obtaining high efficiency and wide bandwidth boost converters for high-power low-voltage applications [9]. The topology has been used as a building block in several fuel-cell applications, such as the serial–parallel hybrid system reported in [10]. An even more versatile bidirectional version was introduced in [11, 12] where digital and analogue controls have been studied for low-voltage applications. However, to achieve ideal magnetic inductor coupling, the bifilar winding technique is used [13-16], which increases parasitic winding-to-winding capacitance. In high-voltage applications, associated losses to this parasitic capacitance have significant value and are one of the reasons of the theoretical versus experimental efficiency mismatch and the appearance of voltage switch spikes. The coupled inductor design presented in [17] has been used for the non-inverting dc–dc buck–boost converter, this design allows flexibility to adjust the coupling coefficient by connecting tightly coupled inductors () in series with the separate uncoupled inductor. This method is used in [4], where the peak efficiency obtained is of for an input voltage of and an output voltage of . This converter has the peak efficiency when the input and output voltages are similar. The high-efficiency voltage gain range is between 0.5 and 2. This work presents the design of a hard-switching high-voltage bidirectional buck–boost converter with coupled inductors. The experimental results show that the implementation of the coupled inductors following the multiple-core approach used in [17] presents low efficiency in high-voltage applications. After analysing the converter power loss, it is possible to conclude that the high parasitic winding-to-winding capacitance value is the responsibility of the majority power loss in the converter. Then, a single-core design procedure of the coupled inductors is used and tested, now showing good efficiency measurements over a wide range of operating points. A summarised comparison of the peak efficiency of the dc–dc converters with coupled inductors that use both approaches of coupled inductor implementation used in this work is provided in Table 1. The coupled inductors were built in a toroidal core. The multiple-core approach design is composed of a tightly coupled inductor (with a coupling coefficient ) in series with separate uncoupled inductors. These uncoupled inductors represent the leakage inductance for the structure. This method allows fulfilling more accurately the coupling specifications. In the case of using the single-core approach, its low core permeability coefficient leads to obtain a low coupling coefficient, as shown in Table 1. Using this methodology, the non-inverting buck–boost converter with the single-core approach has been shown a higher peak efficiency in high-voltage. The single-core method also is used in low-power low-voltage applications in order to reduce the number of magnetic elements [22]. In [20, 4], the converter presents high peak efficiency for low-voltage applications, showing the parasitic winding-to-winding capacitance in the multiple magnetic core implementation has not major effects in converter efficiency in low-voltage applications. The description of the two possibilities of implementing the coupled inductors is presented in Section 2, where the design for two power stages is presented. The proposed design of the coupled inductors and the associated damping network required to be efficient at high voltages are presented in Section 3. A comparative study of the winding-to-winding of coupled inductors is presented in Section 4. Current control is introduced in Section 5. Finally, Sections 6 and 7 provide, respectively, the experimental results and conclusions. Table 1. Peak efficiency of dc–dc converters with coupled inductors Presented in Converter type Coupled inductor design Input voltage, V Output voltage, V Switching frequency, kHz Rated power, W Peak efficiency, % [18] Cuk-SEPIC converter Multiple-core approach, coupling coefficient: 0.89, core permeability coefficient: 60 400.0 360.0 100 4000 92.5 [19] Interleaved high step-up converter Single-core approach, coupling coefficient: 0.98, core permeability coefficient: 50 21.0 270.0 50 1000 97.3 [20] Zero-voltage switching (ZVS) bidirectional step-up converter Multiple-core approach, coupling coefficient: 0.7, core permeability coefficient: 26 48.0 100.0 100 350 94.0 [21] High step-up dc–dc converter Single-core approach, coupling coefficient: 0.98, core permeability coefficient: 50 40.0 400.0 50 500 96.2 [22] Isolated resonant dc–dc ZVS Single-core approach, coupling coefficient: 0.6, core permeability coefficient: 16 80.1 20.8 2000 30 95.7 [4] Unidirectional non-inverting buck–boost converter Multiple-core approach, coupling coefficient: 0.5, core permeability coefficient: 60 51.0 48.0 100 700 97.0 [23] Bidirectional non-inverting buck–boost converter Multiple-core approach, coupling coefficient: 0.75, core permeability coefficient: 26 200.0 175.0 100 1600 91.0 in this paper Bidirectional non-inverting buck–boost converter Single-core approach, coupling coefficient: 0.5, core permeability coefficient: 26 350.0 300.0 100 1600 98.0 2 Non-inverting buck–boost converter The topology of the bidirectional non-inverting buck–boost converter is shown in Fig. 1. It is composed by a buck–boost cell of two MOSFET half bridges, an damping network connected in parallel with the intermediate capacitor C, and a pair of coupled inductors, one connected between the input and the middle node of the one half bridge, and the second one between the output and the middle node of the other half bridge. To achieve high efficiency, depending on the mode of operation, one of the half bridges switches at high frequency while the high-side MOSFET of the other half bridge is permanently in the ON-state and the low-side one is in the OFF-state. In the scheme of Fig. 2, the duty cycle is used to activate the switch and for boost mode. and are switched with the duty cycle for buck mode. Activation signals and are activated in a complementary manner while is set at and is set at , in boost mode. Otherwise, and are activated in a complementary manner while is set at and is set at , in buck mode. The duty cycles are computed considering a variable control , where in boost mode and for buck mode [4]. In addition, the digital controller allows simple incorporation of the operational dead-zone avoidance technique [5] as shown in the switch signals generation of Fig. 2. The hysteretic method presented in [5] has been employed to avoid oscillations due to transition among different operating modes, i.e. buck, buck–boost and boost. Fig. 3 depicts the transition method. Hysteresis windows (, ) are used to get smooth operating mode transitions. In order to operate the converter in a steady state, the duty cycles can be defined as and . The operation modes are obtained varying u. When u is increased, the converter operates in buck mode for , in buck–boost mode for , in boost mode for . Following the same process when u is decremented, the converter operates in boost mode for , in buck–boost mode for and buck mode for . The following conditions should be fulfilled to set the hysteresis window widths: (1a) (1b) (1c) where is the minimum boost duty cycle, is the maximum buck duty cycle and is the minimum value of the overlapping coefficient e. Fig. 1Open in figure viewerPowerPoint Schemes of the buck–boost power stage (a) Multiple-core approach, (b) Single-core approach Fig. 2Open in figure viewerPowerPoint Diagram of switch signals generation Fig. 3Open in figure viewerPowerPoint Scheme of the hysteretic transition method Therefore, the converter operates either as a boost converter with output filter or as a buck converter with input filter, without the higher voltage stress on the switches of other step-up/step-down converter structures. The coupled inductors for the multiple-core approach buck–boost power stage can be designed following the transformer model in order to obtain a predictable coupling coefficient, as shown in Fig. 1a, where is the magnetising inductance, is the leakage inductance, and the coupled coefficient k is determined by [9]. In [4] coupled inductors with turns ratio and resulted in identical control-to-output transfer functions for both operation modes (step-down or buck mode and step-up or boost mode). Accordingly, the dynamic characteristics of the output voltage and output current were continuous at the transition point between the boost and buck modes. Coupled inductors can be defined and constructed in different ways. In the photovoltaic application reported in [24], the coupling coefficient is defined as , where M is the mutual inductance, and and are the self-inductances of the primary and the secondary coils, respectively. In both [24, 12], a 1:1 transformer was constructed with a pair of tightly coupled inductors of turns ratio and a magnetising inductance . Two identical non-coupled inductors were connected in series with the primary and the secondary of the transformer, where , and , and therefore . The unusual symmetrical arrangement of three different magnetic elements was the form of mimicking two loosely coupled inductors with an equal number of turns coiled around a single core, such as the single-core approach Fig. 1b. It is composed of a pair of loosely coupled inductors with unitary turns ratio and magnetic coupling coefficient . Therefore, primary self-inductance is equal to secondary self-inductance (), and their mutual inductance is . Two different power-stages correspondings with each of the coupled inductors approaches have been built. PS1 is the multiple-core bidirectional non-inverting buck–boost converter approach (Fig. 1a) with a pair of tightly coupled inductors and a non-coupled additional. On the other hand, PS2 is the proposed bidirectional non-inverting buck–boost converter with only one magnetic element (Fig. 1b), which is a pair of loosely coupled inductors (coupling coefficient ). PS1 and PS2 are designed with the specifications of the buck–boost converter's parameters given in Table 2. The output current range is between −4 and 4 A. The input voltage range is between 200 and 400 V, and the output voltage range goes from 0 to 400 V. The switching frequency is 100 kHz. The components and of Fig. 1 can be calculated as in [4] with (2) where for PS1 and for PS2. An important aspect affecting efficiency but required to obtain the minimum-phase desired dynamics is the power loss in (), which is analysed in [9]. Dissipated power depends on the amplitude of the voltage ripple, , at the intermediate capacitor as (3) assuming a ripple of triangular shape so that its rms value can be estimated easily. The expressions to calculate peak-to-peak ripples of currents and voltages are listed in Table 3, where T is the switching period, and and are the steady-state duty cycles in boost mode and buck mode, respectively. Table 2 shows the description and values for each power stage components selected for its implementation. Table 2. Selected components and parameters for the buck–boost converter Common parameters for PS1 and PS2 Value or type input voltage 200–400 V output voltage 100–400 V rated power 1.6 kW switching frequency 100 kHz output capacitor 28 μF intermediate capacitor C 4 × R76PN33304030 J multiple-core approach (PS1) Value or type coupled inductor core: 77908 magnetics number of turns: 93 wire size: 18-AWG coupling coefficient 1 non-coupled inductor core: 77191 magnetics number of turns: 65 wire size: 18-AWG global coupling coefficient 0.75 damping resistance BPR10100J, 10 Ω, 10 W, 500 V damping capacitor MKP1848S61070JP2C, 700 V, 10 μF single-core approach (PS2) value or type coupled inductor core: 77908 magnetics number of turns: 80 wire size: 18-AWG global coupling coefficient 0.5 damping resistance 2 × BPR10100J in parallel, 10 W, 500 V, 5 Ω damping capacitor MKP1848S62070JP2F, 700 V, 20 μF Table 3. Peak-to-peak ripple amplitudes for PS1 and PS2 Buck mode Boost mode PS1 PS2 2.1 Buck–boost converter PS1 design The design of PS1 was presented in [23] for a high-voltage application. In [23], the non-inverting dc–dc converter has been designed to regulate the power flow between the battery and the dc input of the EV inverter drive following the design procedure described in [4]. The converter is designed to regulate in the dc-link voltage, with . The value of peak-to-peak current ripples for input and output converter are calculated, taking into account the nominal power of the system, which is 1.6 kW, its values corresponding to 100% of the mean current values. The value of is the difference between and in (Fig. 1a). Therefore the peak-to-peak current ripples values are: , and . The peak-to-peak voltage ripple established for the intermediate capacitor is and the power loss desired for is . The steps to calculate the component values of the buck–boost converter are explained in Algorithm 1 (see Fig. 4). Fig. 4Open in figure viewerPowerPoint Algorithm 1: buck–boost PS1 design The resulting values from Algorithm 1 (Fig. 4) are , , and . The value of the inductor is calculated following the equation for from Table 3 in boost mode and its value is 214 μH. The state-space averaging (SSA) method to apply PS1 (Fig. 1a) leads to the following set of differential equations introduced in [4]: (4) 2.2 Buck–boost converter PS2 design The component values for the buck–boost converter PS2 from Fig. 1b have been selected, taking into account the parameters of the converter's specification given in Table 2. In order to compare the two power stages, the design of PS2 maintains the same characteristic of the studied converter (PS1) in terms of size, material and cost. The power losses in are . Using (5), the damping resistor selected is with . Keeping the same value for the intermediate capacitor of , the values for and M are selected using (4), being and . The value for L is according with the coupled inductor design and is explained in the next section. Equations (4) and (5) have been used for the converter model studied in [4, 23]. To study the internal dynamics of the converter for the component values selected, the transfer functions from the input signals to the output voltage are found. In order to ensure that the internal system dynamics is sufficiently damped, the polynomials from the transfer functions are tested for different operating points of the converter. Therefore, the damping coefficients of the complex zeros have to be >0.5 (). The small-signal state-state vector is defined as , where and are the averaged input and output currents, respectively, is the averaged voltage in the intermediate capacitor, is the averaged voltage in the damping capacitor and is the averaged output voltage. The input vector is . A continuous conduction mode (CCM) operation for the converter is considered in the analysis. Using the differential equations of the state variables expressed in [24] and the use of the SSA method to the following expressions for the state variables of the proposed converter from Fig. 1b : (5) The transfer functions from the input signals to the output voltage are found, as follows: The component values are evaluated, testing the transfer functions and , taking into account that the zeros must be sufficiently damped. In boost mode, the numerator of is a third-degree polynomial (8) (6) where and for buck mode, the numerator of is (7) where (8) The components values listed in Table 2 for PS2 are used to evaluate the internal dynamics of the system. The roots of the polynomial characteristic in boost mode (8) are plotted in Fig. 5a, setting with the output current range and duty cycle range , with step variations of 1 A and 0.003, respectively. Test for buck mode is realised with . The root values of the polynomial characteristic (9) for the same range and duty cycle range , with the same step variations, are represented in Fig. 5b. To plot the roots values, these were normalised respect to the natural frequency , as in [12]. The normalised converter parameters are expressed as: and . Fig. 5 shows that the internal system dynamics is sufficiently damped for the components selected, where the complex zeros are below the upper limit for a damping coefficient higher than 0.5. Fig. 5Open in figure viewerPowerPoint Roots of the characteristic polynomial of the PS2 converter (a) Boost mode, (b) Buck mode The Bode plots of frequency responses obtained from the switched converter in PSIM are depicted in Fig. 6. Fig. 6Open in figure viewerPowerPoint Frequency response of the small-signal control-to-output transfer function. Simulation of the switched model using PSIM in boost mode (a) Magnitude [dB], (b) Phase [deg] The maximum frequency plotted is half of the switching frequency. The frequency responses and the roots of the polynomial of the small-signal to output transfer function (Fig. 5) show the system with no RHP zeros, as seen in [7, 8]. Its dynamic is similar to that of a transfer function with two complex conjugate poles and no zeros, therefore the buck–boost converter can be controlled as a buck converter. 2.3 Transient voltage protection of high gate driver and MOSFETs The MOSFET driver used in the implementation of PS1 and PS2 is the UCC27714 (high and low sides). In order to eliminate the negative return spike in the high-side floating voltage supply of pin (HS), the recommendation exposed in [25] has been followed. Fig. 7 shows the input and output currents, and the intermediate node for each half-bridge MOSFETs, when the boost node (node b voltage) is switching. A negative spike voltage is seen. The UCC27714 driver can keep a logical operation with negative voltage up to −8 V on HS pin. Nonetheless, a negative spike with values below this limit can cause erratic operation. Selecting a series gate resistor value of , this value of resistor allows a high switch speed and a decrease in the amplitude of the negative spike. A fast power diode D1 is set between the HS and the COM pin, besides a resistor to limit the current across the diode. These elements are added to the basic schematic of the MOSFET driver, as shown in Fig. 8a. On the other hand, for transient voltages on the gate-source MOSFET, a diode and a Zener diode of 16 V are used, both connected in series to protect the MOSFET. Moreover, to limit the voltage in , was chosen. The schematic representation of this protection is shown in Fig. 8b. Fig. 7Open in figure viewerPowerPoint Switching node voltage in power converter Fig. 8Open in figure viewerPowerPoint Diagram of (a) Circuit schematic driver, (b) Transient voltage MOSFET protection 3 Coupled inductors design The transformer model parameters of the non-symmetrical coupled inductors in PS1 are , , and . As shown in Fig. 9a, a tightly coupled inductors pair (coupling coefficient ) have been built by coiling around a toroidal core, in the uniform interleaved arrangement, an equal number of turns () of 18-AWG copper wire for both windings. The core is a Magnetics 77908 toroid with a relative permeability coefficient of . A non-coupled inductor (shown in Fig. 1a), built by winding 65 turns of 18-AWG copper wire around a Magnetics 77191 core, has been associated in series with the secondary winding. The equivalent transformer model of the arrangement has a global coupling coefficient To decrease the parasitic capacitance value between primary and secondary windings, the pair of coupled inductors of PS2 (, turns) is built, increasing the distance between the windings [26]. It has an experimental coupling coefficient and was constructed, as depicted in Fig. 9b, where each 18-AWG copper coil occupies one half of a Magnetics 77908 toroidal core. The flux density maps in the cores of both implementations shown in Fig. 9 have been obtained using a two-dimensional finite element method (2D-FEM) FEMM 4.2 software. For the coupled inductors of PS1, the flux linkages in the primary and secondary windings for a primary current and keeping the secondary in open circuit, were and , respectively. Therefore, the primary self-inductance is and the mutual inductance is . A similar process was used to find the self-inductance of the secondary, getting . Therefore, the simulated result of the coupling coefficient was . As expected from the interleaved arrangement, the distribution of the flux density in the core of Fig. 9a is uniform, whereas it is not uniform in the core of Fig. 9b, where there is also an important flux leakage. Simulated values of and were obtained, with a corresponding coupling coefficient of . However, in this case the parameters obtained from simulations are different from those extrapolated from the slopes of the current ripples shown in Table 3 (, , and ). The common and specific parameters of the buck–boost power stages are summarised in Table 2. This is because the real flux leakage is higher than the one suggested by the 2D-FEM inductor model. Fig. 9Open in figure viewerPowerPoint Flux density map of the coupled inductors modelled using FEMM (a) Multiple-core approach, (b) Single-core approach 4 Parasitic winding-to-winding capacitance analysis Measurements of the parasitic winding-to-winding capacitance of the coupled inductors were performed using a QuadTech 1910 LCR meter. The measurements taken at different frequencies are listed in Table 4. For all the frequencies, the value of the parasitic capacitor is for the coupled inductor with , a quite large value explained by the highly interleaved winding arrangement required to have tight magnetic coupling. Table 4. Winding-to-winding capacitance of the coupled inductors Frequency, kHz Capacitance wind1-wind2 PS1, pF PS2, pF 63.10 14,530 76.44 89.13 14,510 76.45 125.89 14,510 71.24 177.83 14,520 70.04 Considering boost mode, in each switching cycle, the parasitic capacitor is charged up to the output voltage and discharged completely to zero volts. When the converter works in buck mode, the parasitic capacitor voltage evolves between the input voltage and zero volts. Assuming that all the energy stored in the parasitic capacitor (9) is lost, when the voltage applied across the switch is 400 V and , the power loss reaches 120 W. On the other hand, the measured parasitic capacitance for the coupled inductors with used in PS2 is . Hence, the power loss will be greatly reduced using the proposed implementation in high-voltage applications. LTspice simulations have been developed to roughly predict the power loss associated to the winding-to-winding parasitic capacitance of the coupled inductors. In addition to the previous capacitance values, the simulation uses the parameters of Table 2, an almost ideal switch (SW) with only on-resistance, and . Fig. 10 shows the simulated results of current and voltage across SW that represents the low-side MOSFET () when the converter is working in boost mode. Fig. 10a corresponds to PS1 with a parasitic capacitance of 15 nF connected between the b and d nodes (see Fig. 1). Each switching period, the 15 nF capacitor is discharged exponentially through the switch (, ) with a peak current near to 4 kA (400 V/ ) in
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