Portal de Periódicos da CAPES

Multi-chip front-end electronics LYRA for X and γ Ray detector for HERMES mission

2021; Institute of Physics; Volume: 16; Issue: 12 Linguagem: Inglês

10.1088/1748-0221/16/12/t12013

1748-0221

Massimo Gandola, Filippo Mele, M. Grassi, P. Malcovati, G. Bertuccio,

CCD and CMOS Imaging Sensors

Abstract We present the experimental results of the Application Specific Integrated Circuit (ASIC), called LYRA, specifically designed for the High-Energy Rapid Modular Ensemble of Satellites (HERMES) mission concept, a constellation of nano-satellites able to detect and localize high-energy rapid transient events (up to 2.2 MeV) as the Gamma Ray Bursts (GRBs) from the deep space. LYRA has been desied for the detection system composed by a combination of Gadolinium Aluminum Gallium Garnet (GAGG) scintillators for high-energy photons, coupled to a matrix of 120 silicon drift detectors (SDD), used for detecting both scintillation light and low-energy photons. The LYRA ASIC has been conceived with a multi-chip architecture: 120 LYRA Front-End chips (LYRA-FE) are placed in close proximity to the anodes of the SDD matrix for a first processing of the detector signals and trasmit them in current mode to four 32-channel LYRA Back-End chips (LYRA-BE) to complete the elaboration. The requirements that the LYRA ASIC have to fulfill for the HERMES project are challenging: the maximum input energy measured in Silicon must reach 120 keV — corresponding to 2.2 MeV on GAGG — with a linearity error below 1%, the electronic noise must be less then 30 el. r.m.s. and the power consumption less then 1 mW per channel in a system with 120 channels working in parallel. The characterization of LYRA has been carried out on a dedicated test board, coupling one channel of the ASIC with a 25 mm 2 SDD. An input full scale range of 5.2 fC and an electronic noise of 22 el. r.m.s. have been measured at -33 ∘ C with a power consumption of 745 µW per channel.